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AD8641AKSZ-R2

P1-P3P4-P6P7-P9P10-P12P13-P15
Data Sheet AD8641/AD8642/AD8643
Rev. F | Page 7 of 15
INPUT BIAS CURRENT (pA)
0.1
1
10
100
1000
50 75
0
25
100 125
150
TEMPERATURE (°
C)
05072-008
V
SY
=
±
13V
Figure 13. Input Bias Current vs. Temperature
–1.0
–
0.8
–0.6
–0.4
–0.2
0
0.2
0.4
0.6
0.8
1.0
INPUT BIAS (pA)
–5
–4 –
3 –2
–1 0 1 2 3 4 5
V
CM
(V)
05072-009
V
SY
=
+5V OR ±
5V
Figure 14. Input Bias Current vs. V
CM
V
OS
(µV)
–15 –13 –11 –9 –7 –5 –3 –1 1 3 5 7 9 11 13 15
V
CM
(V)
05072-010
0
–100
0
200
600
800
1000
400
100
500
700
900
300
V
SY
=
±13V
Figure 15. Input Offset Voltage vs. V
CM
–500
–400
–300
–200
–100
0
100
200
300
400
500
V
OS
(µV)
1.0 1.50 0.5 2.0 2.5
V
CM
(V)
05072-011
V
SY
=
5V
Figure 16. Input Offset Voltage vs. V
CM
OPEN-LOOP GAIN (V/V)
10k
1M
100k
10M
LOAD RESISTANCE (kΩ
)
0.1
10
1 100
05072-012
V
SY
=
±
13V
V
SY
=
±
2.5V
Figure 17. Open-Loop Gain vs. Load Resistance
A
VO
(V/mV)
1
100
10
1000
–50 –30 –10 10 30 50 70
90 110 130 150
TEMPERATURE (°C)
05072-013
A. V
SY
= ±13V, V
O
=
±11V, R
L
= 10kΩ
B. V
SY
= ±13V, V
O
= ±11V, R
L
= 2kΩ
C. V
SY
= +5V, V
O
= +0.5V/+4.5V, R
L
= 10kΩ
D. V
SY
= +5V, V
O
= +0.5V/+4.5V, R
L
= 2kΩ
E. V
SY
= +5V, V
O
= +0.5V/+4.5V, R
L
= 600Ω
A
B
C
D
E
Figure 18. Open-Loop Gain vs. Temperature
AD8641/AD8642/AD8643 Data Sheet
Rev. F | Page 8 of 15
–600
–400
–200
–300
–500
0
–100
OFFSET VOLTAGE (µV)
200
100
400
300
600
500
–5 0–15 –10 5 10 15
OUTPUT VOLTAGE (V)
05072-014
10kΩ
1kΩ
100kΩ
V
SY
=
±13V
Figure 19. Input Error Voltage vs. Output Voltage for Resistive Loads
–350
–250
–150
–200
–300
–50
–100
INPUT VOLTAGE (µV)
50
0
150
100
250
200
0 50 100 150 200 250 300 350
OUTPUT VOLTAGE FROM SUPPLY RAIL (mV)
05072-015
R
L
= 1kΩ
POS RAIL
NEG RAIL
R
L
= 10kΩ
R
L
= 2kΩ
R
L
= 100kΩ
R
L
= 100kΩ
R
L
= 10kΩ
R
L
= 1kΩ
R
L
= 2kΩ
V
SY
=
±5V
Figure 20. Input Error Voltage vs. Output Voltage
Within 300 mV of Supply Rails
0
100
200
300
400
500
I
SY
(µA)
600
700
800
4 8 12 16 20 24 28
V
SY
(V)
05072-016
+25°
C
–55°C
+125
°C
Figure 21. Quiescent Current vs. Supply Voltage at Different Temperatures
SATURATION VOLTAGE (mV)
1
10
100
1000
10000
0.001 0.01 0.1 1 10 100
LOAD CURRENT (mA)
05072-017
–
V
SY
– V
OL
V
SY
– V
OH
V
SY
=
±13V
Figure 22. Output Saturation Voltage vs. Load Current
SATURATION VOLTAGE (mV)
1
10
100
1000
10000
0.001 0.01 0.1 1 10 100
LOAD CURRENT (mA)
05072-018
V
OL
V
SY
– V
OH
V
SY
=
5V
Figure 23. Output Saturation Voltage vs. Load Current
–30 –135
–90
–
45
0
45
90
135
180
225
270
315
–20
–10
0
10
20
30
40
50
60
70
10k 100k 1M 10M
PHASE (Degrees)
GAIN
PHASE
V
SY
=
±
13V
R
L
= 2k
Ω
C
L
= 40pF
GAIN (dB)
FREQUENCY (Hz)
05072-019
Figure 24. Open-Loop Gain and Phase Margin vs. Frequency
Data Sheet AD8641/AD8642/AD8643
Rev. F | Page 9 of 15
–30 –135
–90
–45
0
45
90
135
180
225
270
315
–20
–10
0
10
20
30
40
50
60
70
10k 100k 1M 10M
PHASE (Degrees)
GAIN
PHASE
GAIN (dB)
FREQUENCY (Hz)
05072-020
V
SY
= 5V
R
L
= 2k
Ω
C
L
= 40pF
Figure 25. Open-Loop Gain and Phase Margin vs. Frequency
FREQUENCY (Hz)
–30
–20
–10
0
10
20
30
40
50
60
70
1k 10k 100k 1M 10M
GAIN (dB)
V
SY
=
±13V
R
L
= 2kΩ
C
L
= 40pF
G = +100
G = +1
G = +10
05072-021
Figure 26. Closed-Loop Gain vs. Frequency
FREQ
UEN
CY (Hz)
–30
–20
–10
0
10
20
30
40
50
60
70
1k 10k 100k 1M 10M
GAIN (dB)
G = +100
G = +1
G = +10
05072-022
V
SY
= 5V
R
L
= 2k
Ω
C
L
= 40pF
Figure 27. Closed-Loop Gain vs. Frequency
–60
–
40
–20
0
20
40
60
80
100
120
140
1k
10k
100k 1M 10M
FR
EQ
UEN
CY
(H
z)
CMRR (dB)
05072-023
V
SY
=
±
13V
Figure 28. CMRR vs. Frequency
–
60
–40
–20
0
20
40
60
80
100
120
140
1k 10k 100k 1M 10M
FREQ
UENC
Y (Hz)
CMRR (dB)
05072-024
V
S
Y
= 5V
Figure 29. CMRR vs. Frequency
–60
–40
–20
0
20
40
60
80
100
120
140
1k 10k
100k 1M 10M
FREQUEN
CY (Hz)
PSRR (dB)
05072-025
+PSRR
–PSRR
V
SY
=
±
13
V
Figure 30. PSRR vs. Frequency
P1-P3P4-P6P7-P9P10-P12P13-P15

AD8641AKSZ-R2

Mfr. #:
Buy AD8641AKSZ-R2
Manufacturer:
Analog Devices Inc.
Description:
Precision Amplifiers Low Pwr RRO Prec SGL JFET
Lifecycle:
New from this manufacturer.
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