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Functional description TDA7333
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3 Functional description
3.1 Overview
The new RDS/RBDS processor contains all RDS/RBDS relevant functions on a single chip.
It recovers the inaudible RDS/RBDS information which are transmitted on most FM radio
broadcasting stations.
Due to an integrated 3
rd
order sigma delta converter, which samples the MPX signal, all
further processing is done in the digital domain and therefore very economical. After filtering
the highly oversampled output of the A/D converter, the RDS/RBDS demodulator extracts
the RDS DataClock, RDS Data Signal and the Quality information. A next RDS/RBDS
decoder will synchronize the bitwise RDS stream to a group and block wise information.
This processing includes an error detection and error correction algorithm. In addition, an
automatic flywheel control avoids exhaustive data exchange between the RDS/RBDS
processor and the host.
The device operates in accordance with the EBU (European Broadcasting Union)
specifications.
3.2 Sigma delta converter
The sigma delta modulator is a 3
rd
order (second order-first order cascade) structure.
Therefore a multibit output (2 bit streams) represents the analog input signal. A next digital
noise canceller will take the 2 bit streams and calculates a combined stream which is then
fed to the decimation filter. The modulator works at a sampling frequency of XTI/2. The
oversampling factor in relation to the band of interest (57 kHz ±2.4 kHz) is 38.
3.3 Sinc4/16 decimation filter
The oversampled data delivered from the modulator are decimated by a value of 16 with a
4
th
order Sinc Filter.
This is considered to be the optimum solution for high decimation factors and for a 3
rd
order
sigma delta modulator.
The architecture is a very economical implementation because digital multipliers are not
required. It is implemented by cascading 4 integrators operating at full sampling rate (XTI/2)
followed by 4 differentiates operating at the reduced sampling rate (XTI/2/16). Also wrap
around logic is allowed and the internal overflow will not affect the output signal as long as a
minimum required bit width is maintained.
The transfer function of this Sinc4/16 filter is:
with K = 4, M = 16
Hz()
1
M
---- -
1z
M–
–
1z
1–
–
--------------------
⎝⎠
⎜⎟
⎛⎞
K
=
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