LTC1735CF Datasheet LTC1735EGN#PBF, LTC1735CS#TRPBF, LTC1735CGN#TRPBF | P10-P12

LTC1735

1735fc

OPERATIO

(Refer to Functional Diagram)

When the FCB pin is driven by an external oscillator, a low

noise cycle-skipping mode is invoked and the internal

oscillator is synchronized to the external clock by com-

parator C. In this mode the 25% minimum inductor

current clamp is removed, providing constant frequency

discontinuous operation over the widest possible output

current range. This constant frequency operation is not

quite as efficient as Burst Mode operation, but provides a

lower noise, constant frequency spectrum.

Tying the FCB pin to ground enables forced continuous

operation. This is the least efficient mode, but is desirable

in certain applications. The output can source or sink

current in this mode. When sinking current while in forced

continuous operation, current will be forced back into the

main power supply potentially boosting the input supply to

dangerous voltage levels—BEWARE.

Foldback Current, Short-Circuit Detection and

Short-Circuit Latchoff

The RUN/SS capacitor, C

, is used initially to limit the

inrush current of the switching regulator. After the con-

troller has been started and been given adequate time to

charge up the output capacitors and provide full load cur-

rent, C

is used as a short-circuit time-out circuit. If the

output voltage falls to less than 70% of its nominal output

voltage, C

begins discharging on the assumption that

the output is in an overcurrent and/or short-circuit condi-

tion. If the condition lasts for a long enough period as

determined by the size of C

, the controller will be shut

down until the RUN/SS pin voltage is recycled. This built-

in latchoff can be overridden by providing a current >5µA

at a compliance of 5V to the RUN/SS pin. This current

shortens the soft-start period but also prevents net dis-

charge of C

during an overcurrent and/or short-circuit

condition. Foldback current limiting is activated when the

output voltage falls below 70% of its nominal level whether

or not the short-circuit latchoff circuit is enabled.

The main control loop is shut down by pulling Pin 2

(RUN/SS) low. Releasing RUN/SS allows an internal 1.2µA

current source to charge soft-start capacitor C

. When

reaches 1.5V, the main control loop is enabled with the

voltage clamped at approximately 30% of its maximum

value. As C

continues to charge, I

is gradually re-

leased allowing normal operation to resume. If V

OUT

has

not reached 70% of its final value when C

has charged

to 4.1V, latchoff can be invoked as described in the

Applications Information section.

The internal oscillator can be synchronized to an external

clock applied to the FCB pin and can lock to a frequency

between 90% and 130% of its nominal rate set by capaci-

tor C

OSC

An overvoltage comparator, OV, guards against transient

overshoots (>7.5%) as well as other more serious

conditions that may overvoltage the output. In this case,

the top MOSFET is turned off and the bottom MOSFET is

turned on until the overvoltage condition is cleared.

Foldback current limiting for an output shorted to ground

is provided by amplifier A. As V

OSENSE

drops below 0.6V,

the buffered I

input to the current comparator is gradu-

ally pulled down to a 0.86V clamp. This reduces peak

inductor current to about 1/4 of its maximum value.

Low Current Operation

The LTC1735 has three low current modes controlled by

the FCB pin. Burst Mode operation is selected when the

FCB pin is above 0.8V (typically tied to INTV

). In Burst

Mode operation, if the error amplifier drives the I

voltage

below 0.86V, the buffered I

input to the current com-

parator will be clamped at 0.86V. The inductor current

peak is then held at approximately 20mV/R

SENSE

(about

1/4 of maximum output current). If I

then drops below

0.5V, the Burst Mode comparator B will turn off both

MOSFETs to maximize efficiency. The load current will be

supplied solely by the output capacitor until I

rises

above the 60mV hysteresis of the comparator and switch-

ing is resumed. Burst Mode operation is disabled by

comparator F when the FCB pin is brought below 0.8V.

This forces continuous operation and can assist second-

ary winding regulation.

LTC1735

1735fc

INTV

/EXTV

POWER

Power for the top and bottom MOSFET drivers and most

of the internal circuitry of the LTC1735 is derived from the

INTV

pin. When the EXTV

pin is left open, an internal

5.2V low dropout regulator supplies the INTV

power

from V

. If EXTV

is raised above 4.7V, the internal

regulator is turned off and an internal switch connects

EXTV

to INTV

. This allows a high efficiency source,

such as the primary or a secondary output of the converter

itself, to provide the INTV

power. Voltages up to 7V can

be applied to EXTV

for additional gate drive capability.

To provide clean start-up and to protect the MOSFETs,

undervoltage lockout is used to keep both MOSFETs off

until the input voltage is above 3.5V.

PGOOD (LTC1735F Only)

A window comparator monitors the output voltage and its

open-drain output is pulled low when the divided down

output voltage is not within ±7.5% of the reference voltage

of 0.8V.

OPERATIO

(Refer to Functional Diagram)

APPLICATIO S I FOR ATIO

WUU

The basic LTC1735 application circuit is shown in Figure␣ 1

on the first page. External component selection is driven

by the load requirement and begins with the selection of

SENSE

. Once R

SENSE

is known, C

OSC

and L can be chosen.

Next, the power MOSFETs and D1 are selected. The

operating frequency and the inductor are chosen based

largely on the desired amount of ripple current. Finally, C

is selected for its ability to handle the large RMS current

into the converter and C

OUT

is chosen with low enough

ESR to meet the output voltage ripple and transient speci-

fications. The circuit shown in Figure 1 can be configured

for operation up to an input voltage of 28V (limited by the

external MOSFETs).

SENSE

Selection for Output Current

SENSE

is chosen based on the required output current.

The LTC1735 current comparator has a maximum thresh-

old of 75mV/R

SENSE

and an input common mode range of

SGND to 1.1(INTV

). The current comparator threshold

sets the peak of the inductor current, yielding a maximum

average output current I

MAX

equal to the peak value less

half the peak-to-peak ripple current, ∆I

Allowing a margin for variations in the LTC1735 and

external component values yields:

SENSE

MAX

OSC

Selection for Operating Frequency and

Synchronization

The choice of operating frequency and inductor value is a

trade-off between efficiency and component size. Low

frequency operation improves efficiency by reducing

MOSFET switching losses, both gate charge loss and

transition loss. However, lower frequency operation re-

quires more inductance for a given amount of ripple

current.

The LTC1735 uses a constant frequency architecture with

the frequency determined by an external oscillator capaci-

tor C

OSC

. Each time the topside MOSFET turns on, the

voltage on C

OSC

is reset to ground. During the on-time,

OSC

is charged by a fixed current. When the voltage on the

capacitor reaches 1.19V, C

OSC

is reset to ground. The

process then repeats.

The value of C

OSC

is calculated from the desired operating

frequency assuming no external clock input on the FCB

pin:

CpF

Frequency

OSC

()

.( )

–=













16110

A graph for selecting C

OSC

versus frequency is shown in

Figure 2. The maximum recommended switching fre-

quency is 550kHz .

LTC1735

1735fc

The internal oscillator runs at its nominal frequency (f

)

when the FCB pin is pulled high to INTV

or connected to

ground. Clocking the FCB pin above and below 0.8V will

cause the internal oscillator to injection lock to an external

clock signal applied to the FCB pin with a frequency

between 0.9f

and 1.3f

. The clock high level must exceed

1.3V for at least 0.3µs and the clock low level must be less

than 0.3V for at least 0.3µs. The top MOSFET turn-on will

synchronize with the rising edge of the clock.

Attempting to synchronize to too high an external fre-

quency (above 1.3f

) can result in inadequate slope com-

pensation and possible loop instability. If this condition

exists simply lower the value of C

OSC

so f

EXT

= f

according

to Figure 2.

APPLICATIO S I FOR ATIO

WUU

of smaller inductor and capacitor values. So why would

anyone ever choose to operate at lower frequencies with

larger components? The answer is efficiency. A higher

frequency generally results in lower efficiency because of

MOSFET gate charge losses. In addition to this basic trade

off, the effect of inductor value on ripple current and low

current operation must also be considered.

The inductor value has a direct effect on ripple current. The

inductor ripple current ∆I

decreases with higher induc-

tance or frequency and increases with higher V

or V

OUT

∆I

L OUT

OUT













()()

–

Accepting larger values of ∆I

allows the use of low

inductances, but results in higher output voltage ripple

and greater core losses. A reasonable starting point for

setting ripple current is ∆I

= 0.3 to 0.4(I

MAX

). Remember,

the maximum ∆I

occurs at the maximum input voltage.

The inductor value also has an effect on low current

operation. The transition to low current operation begins

when the inductor current reaches zero while the bottom

MOSFET is on. Burst Mode operation begins when the

average inductor current required results in a peak current

below 25% of the current limit determined by R

SENSE

Lower inductor values (higher ∆I

) will cause this to occur

at higher load currents, which can cause a dip in efficiency

in the upper range of low current operation. In Burst Mode

operation, lower inductance values will cause the burst

frequency to decrease.

Inductor Core Selection

Once the value for L is known, the type of inductor must be

selected. High efficiency converters generally cannot af-

ford the core loss found in low cost powdered iron cores,

forcing the use of more expensive ferrite, molypermalloy

or Kool Mµ

cores. Actual core loss is independent of

core size for a fixed inductor value, but it is very dependent

on inductance selected. As inductance increases, core

losses decrease. Unfortunately, increased inductance re-

quires more turns of wire and therefore copper losses will

increase.

Figure 2. Timing Capacitor Value

OPERATING FREQUENCY (kHZ)

0 100 200 300 400 500 600

OSC

VALUE (pF)

1735 F02

100.0

87.5

75.0

62.5

50.0

37.5

25.0

12.5

When synchronized to an external clock, Burst Mode

operation is disabled but the inductor current is not

allowed to reverse. The 25% minimum inductor current

clamp present in Burst Mode operation is removed,

providing constant frequency discontinuous operation

over the widest possible output current range. In this

mode the synchronous MOSFET is forced on once every

10 clock cycles to recharge the bootstrap capacitor. This

minimizes audible noise while maintaining reasonably

high efficiency.

Inductor Value Calculation

The operating frequency and inductor selection are inter-

related in that higher operating frequencies allow the use

Kool Mµ is a registered trademark of Magnetics, Inc.

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LTC1735CF

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Manufacturer:

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Description:

Switching Voltage Regulators LTC1735 - High Efficiency Synchronous Step-Down Switching Regulator

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LTC1735CF

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