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LTC1735CF

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LTC1735
1735fc
Ferrite designs have very low core loss and are preferred
at high switching frequencies, so design goals can con-
centrate on copper loss and preventing saturation. Ferrite
core material saturates “hard,” which means that induc-
tance collapses abruptly when the peak design current is
exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple. Do
not allow the core to saturate!
Molypermalloy (from Magnetics, Inc.) is a very good, low
loss core material for toroids, but it is more expensive than
ferrite. A reasonable compromise from the same manu-
facturer is Kool Mµ. Toroids are very space efficient,
especially when you can use several layers of wire. Be-
cause they generally lack a bobbin, mounting is more
difficult. However, designs for surface mount are available
that do not increase the height significantly.
Power MOSFET and D1 Selection
Two external power MOSFETs must be selected for use
with the LTC1735: An N-channel MOSFET for the top
(main) switch and an N-channel MOSFET for the bottom
(synchronous) switch.
The peak-to-peak gate drive levels are set by the INTV
CC
voltage. This voltage is typically 5.2V during start-up (see
EXTV
CC
pin connection). Consequently, logic-level thresh-
old MOSFETs must be used in most LTC1735 applica-
tions. The only exception is when low input voltage is
expected (V
IN
< 5V); then, sub-logic level threshold
MOSFETs (V
GS(TH)
< 3V) should be used. Pay close
attention to the BV
DSS
specification for the MOSFETs as
well; many of the logic level MOSFETs are limited to 30V
or less.
Selection criteria for the power MOSFETs include the “ON”
resistance R
DS(ON)
, reverse transfer capacitance C
RSS
,
input voltage and maximum output current. When the
LTC1735 is operating in continuous mode the duty cycles
for the top and bottom MOSFETs are given by:
Main SwitchDuty Cycle
V
V
OUT
IN
=
Synchronous SwitchDuty Cycle
VV
V
IN OUT
IN
=
–
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The MOSFET power dissipations at maximum output
current are given by:
P
V
V
IR
kV I C f
MAIN
OUT
IN
MAX DS ON
IN MAX RSS
=
()
+
()
+
()( )( )()
2
2
1
δ
()
P
VV
V
IR
SYNC
IN OUT
IN
MAX DS ON
=
()
+
()
–
()
2
1
δ
where δ is the temperature dependency of R
DS(ON)
and k
is a constant inversely related to the gate drive current.
Both MOSFETs have I
2
R losses while the topside
N-channel equation includes an additional term for transi-
tion losses, which are highest at high input voltages. For
V
IN
< 20V the high current efficiency generally improves
with larger MOSFETs, while for V
IN
> 20V the transition
losses rapidly increase to the point that the use of a higher
R
DS(ON)
device with lower C
RSS
actually provides higher
efficiency. The synchronous MOSFET losses are greatest
at high input voltage or during a short-circuit when the
duty cycle in this switch is nearly 100%.
The term (1 + δ) is generally given for a MOSFET in the
form of a normalized R
DS(ON)
vs Temperature curve, but
δ␣ = 0.005/°C can be used as an approximation for low
voltage MOSFETs. C
RSS
is usually specified in the
MOSFET characteristics. The constant k = 1.7 can be
used to estimate the contributions of the two terms in the
main switch dissipation equation.
The Schottky diode D1 shown in Figure 1 conducts during the
dead-time between the conduction of the two power MOSFETs.
This prevents the body diode of the bottom MOSFET from
turning on and storing charge during the dead-time, which
could cost as much as 1% in efficiency. A 3A Schottky is
generally a good size for 10A to 12A regulators due to the
relatively small average current. Larger diodes can result in
additional transition losses due to their larger junction capaci-
tance. The diode may be omitted if the efficiency loss can be
tolerated.
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LTC1735
1735fc
C
IN
Selection
In continuous mode, the source current of the top
N-channel MOSFET is a square wave of duty cycle V
OUT
/
V
IN
. To prevent large voltage transients, a low ESR input
capacitor sized for the maximum RMS current must be
used. The maximum RMS capacitor current is given by:
II
V
V
V
V
RMS O MAX
OUT
IN
IN
OUT
≅
()
/
–1
12
This formula has a maximum at V
IN
= 2V
OUT
, where
I
RMS
␣=␣I
O(MAX)
/2. This simple worst case condition is com-
monly used for design because even significant deviations do
not offer much relief. Note that capacitor manufacturers’
ripple current ratings are often based on only 2000 hours of
life. This makes it advisable to further derate the capacitor or
to choose a capacitor rated at a higher temperature than
required. Several capacitors may also be paralleled to meet
size or height requirements in the design. Always consult the
manufacturer if there is any question.
C
OUT
Selection
The selection of C
OUT
is primarily determined by the
effective series resistance (ESR) to minimize voltage
ripple. The output ripple (∆V
OUT
) in continuous mode is
determined by:
∆∆V I ESR
fC
OUT L
OUT
≈+
1
8
Where f = operating frequency, C
OUT
= output capaci-
tance and ∆I
L
= ripple current in the inductor. The output
ripple is highest at maximum input voltage since ∆I
L
increases with input voltage. Typically, once the ESR
requirement for C
OUT
has been met, the RMS current
rating generally far exceeds the I
RIPPLE(P–P)
requirement.
With ∆I
L
= 0.3I
OUT(MAX)
and allowing 2/3 of the ripple due
to ESR the output ripple will be less than 50mV at max V
IN
assuming:
C
OUT
required ESR < 2.2 R
SENSE
C
OUT
> 1/(8fR
SENSE
)
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The first condition relates to the ripple current into the ESR
of the output capacitance while the second term guaran-
tees that the output capacitance does not significantly
discharge during the operating frequency period due to
ripple current. The choice of using smaller output capaci-
tance increases the ripple voltage due to the discharging
term but can be compensated for by using capacitors of
very low ESR to maintain the ripple voltage at or below
50mV. The I
TH
pin OPTI-LOOP compensation compo-
nents can be optimized to provide stable, high perfor-
mance transient response regardless of the output capaci-
tors selected.
The selection of output capacitors for CPU or other appli-
cations with large load current transients is primarily
determined by the voltage tolerance specifications of the
load. The resistive component of the capacitor, ESR,
multiplied by the load current change plus any output
voltage ripple must be within the voltage tolerance of the
load (CPU).
The required ESR due to a load current step is:
R
ESR
< ∆V/∆I
where ∆I is the change in current from full load to zero load
(or minimum load) and ∆V is the allowed voltage deviation
(not including any droop due to finite capacitance).
The amount of capacitance needed is determined by the
maximum energy stored in the inductor. The capacitance
must be sufficient to absorb the change in inductor current
when a high current to low current transition occurs. The
opposite load current transition is generally determined by
the control loop OPTI-LOOP components, so make sure
not to over compensate and slow down the response. The
minimum capacitance to assure the inductors’ energy is
adequately absorbed is:
C
LI
VV
OUT
OUT
>
()
()
∆
∆
2
2
where ∆I is the change in load current.
Manufacturers such as Nichicon, United Chemi-Con and
Sanyo can be considered for high performance through-
hole capacitors. The OS-CON semiconductor electrolyte
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LTC1735
1735fc
capacitor available from Sanyo has the lowest (ESR)(size)
product of any aluminum electrolytic at a somewhat
higher price. An additional ceramic capacitor in parallel
with OS-CON capacitors is recommended to reduce the
inductance effects.
In surface mount applications, ESR, RMS current han-
dling and load step specifications may require multiple
capacitors in parallel. Aluminum electrolytic, dry tantalum
and special polymer capacitors are available in surface
mount packages. Special polymer surface mount capaci-
tors offer very low ESR but have much lower capacitive
density per unit volume than other capacitor types. These
capacitors offer a very cost-effective output capacitor
solution and are an ideal choice when combined with a
controller having high loop bandwidth. Tantalum capaci-
tors offer the highest capacitance density and are often
used as output capacitors for switching regulators having
controlled soft-start. Several excellent surge-tested choices
are the AVX TPS, AVX TPSV or the KEMET T510 series of
surface mount tantalums, available in case heights rang-
ing from 1.5mm to 4.1mm. Aluminum electrolytic capaci-
tors can be used in cost-driven applications, provided that
consideration is given to ripple current ratings, tempera-
ture and long-term reliability. A typical application will
require several to many aluminum electrolytic capacitors
in parallel. A combination of the above mentioned capaci-
tors will often result in maximizing performance and
minimizing overall cost. Other capacitor types include
Nichicon PL series, NEC Neocap, Panasonic SP and
Sprague 595D series. Consult manufacturers for other
specific recommendations.
Like all components, capacitors are not ideal. Each ca-
pacitor has its own benefits and limitations. Combina-
tions of different capacitor types have proven to be a very
cost effective solution. Remember also to include high
frequency decoupling capacitors. They should be placed
as close as possible to the power pins of the load. Any
inductance present in the circuit board traces negates
their usefulness.
INTV
CC
Regulator
An internal P-channel low dropout regulator produces the
5.2V supply that powers the drivers and internal circuitry
within the LTC1735. The INTV
CC
pin can supply a maxi-
mum RMS current of 50mA and must be bypassed to
ground with a minimum of 4.7µF tantalum, 10µF special
polymer or low ESR type electrolytic capacitor. A 1µF
ceramic capacitor placed directly adjacent to the INTV
CC
and PGND IC pins is highly recommended. Good bypass-
ing is required to supply the high transient currents
required by the MOSFET gate drivers.
Higher input voltage applications in which large MOSFETs
are being driven at high frequencies may cause the maxi-
mum junction temperature rating for the LTC1735 to be
exceeded. The system supply current is normally domi-
nated by the gate charge current. Additional loading of
INTV
CC
also needs to be taken into account for the power
dissipation calculations. The total INTV
CC
current can be
supplied by either the 5.2V internal linear regulator or by
the EXTV
CC
input pin. When the voltage applied to the
EXTV
CC
pin is less than 4.7V, all of the INTV
CC
current is
supplied by the internal 5.2V linear regulator. Power
dissipation for the IC in this case is highest: (V
IN
)(I
INTVCC
)
and overall efficiency is lowered. The gate charge is
dependent on operating frequency as discussed in the
Efficiency Considerations section. The junction tempera-
ture can be estimated by using the equations given in
Note␣ 2 of the Electrical Characteristics. For example, the
LTC1735CS is limited to less than 17mA from a 30V
supply when not using the EXTV
CC
pin as follows:
T
J
= 70°C + (17mA)(30V)(110°C/W) = 126°C
Use of the EXTV
CC
input pin reduces the junction tempera-
ture to:
T
J
= 70°C + (17mA)(5V)(110°C/W) = 79°C
To prevent maximum junction temperature from being
exceeded, the input supply current must be checked
operating in continuous mode at maximum V
IN
.
EXTV
CC
Connection
The LTC1735 contains an internal P-channel MOSFET
switch connected between the EXTV
CC
and INTV
CC
pins.
Whenever the EXTV
CC
pin is above 4.7V, the internal 5.2V
regulator shuts off, the switch closes and INTV
CC
power is
supplied via EXTV
CC
until EXTV
CC
drops below 4.5V. This
allows the MOSFET gate drive and control power to be
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LTC1735CF

Mfr. #:
Buy LTC1735CF
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators LTC1735 - High Efficiency Synchronous Step-Down Switching Regulator
Lifecycle:
New from this manufacturer.
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