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ADP3611JRMZ-REEL

P1-P3P4-P6P7-P9P10-P12P13-P13
© Semiconductor Components Industries, LLC, 2008
October, 2008 − Rev. 0
1 Publication Order Number:
ADP3611/D
ADP3611
Dual Bootstrapped, High
Voltage MOSFET Driver
with Output Disable
The ADP3611 is a dual MOSFET driver optimized for driving two
N−channel switching MOSFETs in nonisolated synchronous buck
power converters used to power CPUs in portable computers. The
driver impedances have been chosen to provide optimum
performance in multiphase regulators at up to 25 A per phase. The
high−side driver can be bootstrapped relative to the switch node of
the buck converter and is designed to accommodate the high voltage
slew rate associated with floating high−side gate drivers. An internal
synchronous MOSFET is used to replace an external bootstrap
Schottky diode. This allows a larger high side gate voltage for
increased efficiency.
The ADP3611 includes an anticross−conduction protection circuit,
undervoltage lockout to hold the switches off until the driver has
sufficient voltage for proper operation, a crowbar input that turns on
the low−side MOSFET independently of the input signal state, and a
low−side MOSFET disable pin to provide higher efficiency at light
loads. The SD pin shuts off both the high−side and the low−side
MOSFETs to prevent rapid output capacitor discharge during system
shutdown.
The ADP3611 is specified over the extended commercial
temperature range of −10°C to 100°C and is available in a 10−lead
MSOP package and 8−lead DFN 2x2 mm package.
Features
• All−in−one Synchronous Buck Driver
• One PWM Signal Generates Both Drives
• Anticross−conduction Protection Circuitry
• Output Disable Function
• Crowbar Control
• Synchronous Override Control
• This is a Pb−Free Device
Applications
• Mobile Computing CPU Core Power Converters
• Multiphase Desk−note CPU Supplies
• Single−supply Synchronous Buck Converters
• Nonsynchronous−to−Synchronous Drive Conversion
http://onsemi.com
MARKING DIAGRAMS
X = Specific Device Code
M = Date Code
G = Pb−Free Package
(Note: Microdot may be in either location)
XX MG
G
1
DFN8
CP SUFFIX
CASE 506AA
MSOP10
JRM SUFFIX
CASE 846AC
XXMG
G
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
ORDERING INFORMATION
1
ADP3611
http://onsemi.com
2
SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM
Figure 1. MSOP−10 Package Block Diagram
GENERAL APPLICATION CIRCUIT
Figure 2. MSOP−10 Package Application Circuit
Table 1. ORDERING INFORMATION
Model
Temperature
Range
Package Description
Package
Option
Quantity
per Reel
†
Branding
ADP3611JRMZ−REEL* −10°C to 100°C 10−Lead Mini Small Outline Package (MSOP) RM−10 3000 3611
ADP3611MNR2G* −10°C to 100°C 8−Lead 2x2 mm Package DFN 3000 D6 M
* Z or G = Pb−Free Part
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
ADP3611
http://onsemi.com
3
Table 2. ELECTRICAL CHARACTERISTICS (V
CC
= SD = 5 V, BST − SW = 5 V, T
A
= −10°C to 100°C, unless otherwise noted)
Parameter Symbol Conditions Min Typ Max Unit
LOGIC INPUTS (IN, SD, DRVLSD, CROWBAR)
Input Voltage High
V
IH
2.0 V
Input Voltage Low V
IL
0.8 V
Input Current I
IN
Inputs = 0 V or 5 V, IN, SD, DRVLSD −1 +1 mA
CROWBAR Resistance R
IN
Resistance from CROWBAR to GND 250 kW
DRVLSD Propagation Delay Time t
pdlDRVLSD
t
pdhDRVLSD
C
LOAD
= 3 nF, Figure 3 20 ns
HIGH−SIDE DRIVER
Output Resistance, Sourcing Current 1.9 3.3 W
Output Resistance, Sinking Current 1.0 2.3 W
Transition Times t
rDRVH
C
LOAD
= 3 nF, Figure 4 20 35 ns
t
fDRVH
C
LOAD
= 3 nF, Figure 4 15 25 ns
Propagation Delay Times (Note 1) t
pdhDRVH
C
LOAD
= 3 nF, Figure 4 15 30 60 ns
t
pdlDRVH
C
LOAD
= 3 nF, Figure 4 20 40 ns
LOW−SIDE DRIVER
Output Resistance, Sourcing Current 1.7 3.3 W
Output Resistance, Sinking Current 0.8 2.3 W
Transition Times t
rDRVL
C
LOAD
= 3 nF, Figure 4 20 30 ns
t
fDRVL
C
LOAD
= 3 nF, Figure 4 15 25 ns
Propagation Delay Times
(Notes 1 and 2)
t
pdhDRVL
C
LOAD
= 3 nF, Figure 4 15 40 ns
t
pdlDRVL
C
LOAD
= 3 nF, Figure 4 15 30 ns
SW Transition Timeout (Note 2) t
SWTO
SW = 2 V 150 270 450 ns
Zero−crossing Threshold V
ZC
1.8 V
BOOTSTRAP RECTIFIER
Output Resistance R
BOOT
10 18 W
SWITCH NODE RESISTOR
Switch Node Resistor R
SW
EN = 0 V 3 kW
SUPPLY
Supply Voltage Range V
CC
4.6 5.5 V
Supply Current − Normal Mode I
SYS(NM)
I
CC
+ I
BST
, IN = 0 V or 5 V 0.5 1 mA
Supply Current − Shutdown Mode I
SYS(SD)
I
CC
+ I
BST
, SD = 0 V 30 200 mA
Undervoltage Lockout Threshold V
CC
Rising 4 4.35 4.5 V
Undervoltage Lockout Hysteresis
(Note 3)
V
CC
Falling 50 210 mV
NOTE: All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC) methods.
1. For propagation delays, t
pdh
refers to the specified signal going high, and t
pdl
refers to the signal going low with transitions measured at 50%.
2. The turn−on of DRVL is initiated after IN goes low by either SW crossing a ~1 V threshold or by expiration of t
SWTO
.
3. Guaranteed by characterization, not production tested.
P1-P3P4-P6P7-P9P10-P12P13-P13

ADP3611JRMZ-REEL

Mfr. #:
Buy ADP3611JRMZ-REEL
Manufacturer:
ON Semiconductor
Description:
Gate Drivers DUAL HI VLTGE MOSFET
Lifecycle:
New from this manufacturer.
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