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CY7C1021DV33-10ZSXA

P1-P3P4-P6P7-P9P10-P12P13-P13
CY7C1021DV33
1-Mbit (64 K x 16) Static RAM
Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Document #: 38-05460 Rev. *G Revised October 25, 2011
Features
■ Temperature ranges
❐ Industrial: –40 °C to 85 °C
❐ Automotive-A: –40 °C to 85 °C
■ Pin-and function-compatible with CY7C1021CV33
■ High speed
❐ t
AA
= 10 ns
■ Low active power
❐ I
CC
= 60 mA @ 10 ns
■ Low CMOS standby power
❐ I
SB2
= 3 mA
■ 2.0 V data retention
■ Automatic power-down when deselected
■ CMOS for optimum speed/power
■ Independent control of upper and lower bits
■ Available in Pb-free 44-pin 400-Mil wide molded SOJ,
44-pin TSOP II and 48-ball VFBGA packages
Functional Description
[1]
The CY7C1021DV33 is a high-performance CMOS static
RAM organized as 65,536 words by 16 bits. This device has
an automatic power-down feature that significantly reduces
power consumption when deselected.
Writing to the device is accomplished by taking Chip Enable
(CE
) and Write Enable (WE) inputs LOW. If Byte Low Enable
(BLE
) is LOW, then data from I/O pins (I/O
0
through I/O
7
), is
written into the location specified on the address pins (A
0
through A
15
). If Byte High Enable (BHE) is LOW, then data
from I/O pins (I/O
8
through I/O
15
) is written into the location
specified on the address pins (A
0
through A
15
).
Reading from the device is accomplished by taking Chip
Enable (CE
) and Output Enable (OE) LOW while forcing the
Write Enable (WE
) HIGH. If Byte Low Enable (BLE) is LOW,
then data from the memory location specified by the address
pins will appear on I/O
0
to I/O
7
. If Byte High Enable (BHE) is
LOW, then data from memory will appear on I/O
8
to I/O
15
. See
the truth table at the end of this data sheet for a complete
description of Read and Write modes.
The input/output pins (I/O
0
through I/O
15
) are placed in a
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE
HIGH), the BHE and BLE
are disabled (BHE
, BLE HIGH), or during a Write operation
(CE
LOW, and WE LOW).
The CY7C1021DV33 is available in Pb-free 44-pin 400-Mil
wide Molded SOJ, 44-pin TSOP II and 48-ball VFBGA
packages.
64K x 16
RAM Array
I/O
0
–I/O
7
ROW DECODER
A
7
A
6
A
5
A
4
A
3
A
0
COLUMN DECODER
A
9
A
10
A
11
A
12
A
13
A
14
A
15
SENSE AMPS
DATA IN DRIVERS
OE
A
2
A
1
I/O
8
–I/O
15
CE
WE
BLE
BHE
A
8
Logic Block Diagram
CY7C1021DV33
Document #: 38-05460 Rev. *G Page 2 of 13
Selection Guide
–10 (Industrial/Automotive-A)
Unit
Maximum access time
10 ns
Maximum operating current
60 mA
Maximum CMOS standby current
3mA
Pin Configuration
[1]
WE
V
CC
A
11
A
10
NC
A
6
A
0
A
3
CE
I/O
10
I/O
8
I/O
9
A
4
A
5
I/O
11
I/O
13
I/O
12
I/O
14
I/O
15
V
SS
A
9
A
8
OE
V
SS
A
7
I/O
0
BHE
NC
A
2
A
1
BLE
V
CC
I/O
1
I/O
2
I/O
3
I/O
4
I/O
5
I/O
6
I/O
7
A
15
A
14
A
13
A
12
NC
NC
NC
3
2
6
5
4
1
D
E
B
A
C
F
G
H
NC
NC
1
2
3
4
5
6
7
8
9
11
14
31
32
36
35
34
33
37
40
39
38
12
13
41
44
43
42
16
15
29
30
A
5
18
17
20
19
27
28
25
26
22
21
23
24
48-ball VFBGA
SOJ/TSOP II
Top View
Top View
A
6
A
7
A
4
A
3
A
2
A
1
A
0
A
14
A
15
A
8
A
9
A
10
A
11
A
12
A
13
NC
NC
OE
BHE
BLE
CE
WE
I/O
0
I/O
1
I/O
2
I/O
3
I/O
4
I/O
5
I/O
6
I/O
7
I/O
8
I/O
9
I/O
10
I/O
11
I/O
12
I/O
13
I/O
14
I/O
15
V
CC
V
CC
V
SS
V
SS
NC
10
Notes
1. NC pins are not connected on the die.
CY7C1021DV33
Document #: 38-05460 Rev. *G Page 3 of 13
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage temperature ................................ –65 C to +150 C
Ambient temperature with
power applied ........................................... –55 C to +125 C
Supply voltage on V
CC
to Relative GND
[2]
...–0.3 V to +4.6 V
DC Voltage applied to outputs
in high-Z State
[2]
....................................–0.3 V to V
CC
+0.3 V
DC input voltage
[2]
.................................–0.3 V to V
CC
+0.3 V
Current into outputs (LOW) ......................................... 20 mA
Static discharge voltage...........................................> 2001 V
(per MIL-STD-883, method 3015)
Latch-up current ......................................................>200 mA
Operating Range
Range
Ambient
Temperature
V
CC
Speed
Industrial –40 °C to +85°C 3.3 V 0.3 V 10 ns
Automotive-A –40 °C to +85°C 10 ns
DC Electrical Characteristics Over the Operating Range
Parameter Description Test Conditions
–10 (Ind’l/Auto-A)
Unit
Min. Max.
V
OH
Output HIGH voltage V
CC
= Min., I
OH
= –4.0 mA 2.4 V
V
OL
Output LOW voltage V
CC
= Min., I
OL
= 8.0 mA 0.4 V
V
IH
Input HIGH voltage 2.0 V
CC
+ 0.3 V
V
IL
Input LOW voltage
[2]
0.3 0.8 V
I
IX
Input leakage current GND < V
I
< V
CC
1+1A
I
OZ
Output leakage current GND < V
I
< V
CC
, Output Disabled 1+1A
I
CC
V
CC
operating
supply current
V
CC
= Max.,
I
OUT
= 0 mA,
f = f
MAX
= 1/t
RC
100 MHz 60 mA
83 MHz 55 mA
66 MHz 45 mA
40 MHz 30 mA
I
SB1
Automatic CE Power-Down
Current —TTL Inputs
Max. V
CC
, CE > V
IH
V
IN
> V
IH
or V
IN
< V
IL
, f = f
MAX
10 mA
I
SB2
Automatic CE Power-Down
Current —CMOS Inputs
Max. V
CC
, CE > V
CC
– 0.3 V,
V
IN
> V
CC
– 0.3 V or V
IN
< 0.3 V, f = 0
3mA
Capacitance
[3]
Parameter Description Test Conditions Max. Unit
C
IN
Input capacitance T
A
= 25C, f = 1 MHz, V
CC
= 3.3 V 8 pF
C
OUT
Output capacitance 8 pF
Thermal Resistance
[3]
Parameter Description Test Conditions SOJ TSOP II VFBGA Unit
JA
Thermal resistance
(Junction to Ambient)
Still Air, soldered on a 3 × 4.5 inch,
four-layer printed circuit board
59.52 53.91 36 C/W
JC
Thermal resistance
(Junction to Case)
36.75 21.24 9 C/W
Notes
2. V
IL
(min.) = –2.0 V and V
IH
(max) = V
CC
+ 1 V for pulse durations of less than 5 ns.
3. Tested initially and after any design or process changes that may affect these parameters.
P1-P3P4-P6P7-P9P10-P12P13-P13

CY7C1021DV33-10ZSXA

Mfr. #:
Buy CY7C1021DV33-10ZSXA
Manufacturer:
Cypress Semiconductor
Description:
SRAM 2Mb 10ns 3.3V 64Kx16 Fast Async SRAM
Lifecycle:
New from this manufacturer.
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