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MC74VHC245DTR2G

P1-P3P4-P6P7-P8
© Semiconductor Components Industries, LLC, 2011
May, 2011 − Rev. 6
1 Publication Order Number:
MC74VHC245/D
MC74VHC245
Octal Bus Buffer/Line Driver
The MC74VHC245 is an advanced high speed CMOS octal bus
transceiver fabricated with silicon gate CMOS technology. It achieves
high speed operation similar to equivalent Bipolar Schottky TTL
while maintaining CMOS low power dissipation.
It is intended for two−way asynchronous communication between
data buses. The direction of data transmission is determined by the
level of the DIR input. The output enable pin (OE
) can be used to
disable the device, so that the buses are effectively isolated.
All inputs are equipped with protection circuits against static
discharge.
• High Speed: t
PD
= 4.0 ns (Typ) at V
CC
= 5 V
• Low Power Dissipation: I
CC
= 4 μA (Max) at T
A
= 25°C
• High Noise Immunity: V
NIH
= V
NIL
= 28% V
CC
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Designed for 2 V to 5.5 V Operating Range
• Low Noise: V
OLP
= 1.2 V (Max)
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300 mA
• ESD Performance: HBM > 2000 V; Machine Model > 200 V
• Chip Complexity: 308 FETs or 77 Equivalent Gates
• These Devices are Pb−Free and are RoHS Compliant
APPLICATION NOTES
• Do not force a signal on an I/O pin when it is an active output,
damage may occur.
• All floating (high impedance) input or I/O pins must be fixed by
means of pull up or pull down resistors or bus terminator ICs.
• A parasitic diode is formed between the bus and V
CC
terminals.
Therefore, the VHC245 cannot be used to interface 5 V to 3 V
systems directly.
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Device Package Shipping
†
ORDERING INFORMATION
MC74VHC245DWG SOIC−20 38 Units/Rail
MC74VHC245DTG TSSOP−20 75 Units/Rail
1
20
MARKING
DIAGRAMS
SOIC−20
DW SUFFIX
CASE 751D
VHC245
AWLYYWWG
TSSOP−20
DT SUFFIX
CASE 948E
1
1
20
1
20
20
VHC245 = Specific Device Code
A = Assembly Location
WL, L = Wafer Lot
Y = Year
WW, W = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
VHC
245
ALYWG
G
MC74VHC245DWR2G SOIC−20 1000 Units/Reel
MC74VHC245DTR2G TSSOP−20 2500 Units/T&R
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
MC74VHC245
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2
Figure 1. LOGIC
DIAGRAM
A
DATA
PORT
A8
A7
A6
A5
A3
A4
A2
A1
9
8
7
6
5
4
3
2
DIR
OE
1
19
18
17
16
15
14
13
12
11
B1
B2
B3
B4
B5
B6
B7
B8
B
DATA
PORT
Figure 2. PIN ASSIGNMENT
A5
A3
A2
A1
DIR
GND
A8
A7
A6
A4 5
4
3
2
1
10
9
8
7
6
14
15
16
17
18
19
20
11
12
13
B3
B2
B1
OE
V
CC
B8
B7
B6
B5
B4
FUNCTION TABLE
Control Inputs
Operation
OE DIR
L L Data Transmitted from Bus B to Bus A
L H Data Transmitted from Bus A to Bus B
H X Buses Isolated (High−Impedance State)
MC74VHC245
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3
MAXIMUM RATINGS*
Symbol Parameter Value Unit
V
CC
DC Supply Voltage – 0.5 to + 7.0 V
V
in
DC Input Voltage – 0.5 to + 7.0 V
V
out
DC Output Voltage – 0.5 to V
CC
+ 0.5 V
I
IK
Input Diode Current − 20 mA
I
OK
Output Diode Current ± 20 mA
I
out
DC Output Current, per Pin ± 25 mA
I
CC
DC Supply Current, V
CC
and GND Pins ± 75 mA
P
D
Power Dissipation in Still Air SOIC Packages†
TSSOP Package†
500
450
mW
T
stg
Storage Temperature – 65 to + 150
_C
* Absolute maximum continuous ratings are those values beyond which damage to the device
may occur. Exposure to these conditions or conditions beyond those indicated may
adversely affect device reliability. Functional operation under absolute−maximum−rated
conditions is not implied.
†Derating — SOIC Packages: – 7 mW/_C from 65_ to 125_C
TSSOP Package: − 6.1 mW/_C from 65_ to 125_C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
V
CC
DC Supply Voltage 2.0 5.5 V
V
in
DC Input Voltage 0 5.5 V
V
out
DC Output Voltage 0 V
CC
V
T
A
Operating Temperature − 40 + 85
_C
t
r
, t
f
Input Rise and Fall Time V
CC
= 3.3V ±0.3V
V
CC
=5.0V ±0.5V
0
0
100
20
ns/V
DC ELECTRICAL CHARACTERISTICS
Symbol Parameter Test Conditions
V
CC
V
T
A
= 25°C T
A
= − 40 to 85°C
Unit
Min Typ Max Min Max
V
IH
Minimum High−Level
Input Voltage
2.0
3.0 to
5.5
1.50
V
CC
x 0.7
1.50
V
CC
x 0.7
V
V
IL
Maximum Low−Level
Input Voltage
2.0
3.0 to
5.5
0.50
V
CC
x 0.3
0.50
V
CC
x 0.3
V
V
OH
Minimum High−Level
Output Voltage
V
in
= V
IH
or V
IL
I
OH
= − 50μA
2.0
3.0
4.5
1.9
2.9
4.4
2.0
3.0
4.5
1.9
2.9
4.4
V
V
in
= V
IH
or V
IL
I
OH
= − 4mA
I
OH
= − 8mA
3.0
4.5
2.58
3.94
2.48
3.80
V
OL
Maximum Low−Level
Output Voltage
V
in
= V
IH
or V
IL
I
OL
= 50μA
2.0
3.0
4.5
0.0
0.0
0.0
0.1
0.1
0.1
0.1
0.1
0.1
V
V
in
= V
IH
or V
IL
I
OL
= 4mA
I
OL
= 8mA
3.0
4.5
0.36
0.36
0.44
0.44
I
in
Maximum Input
Leakage Current
V
in
= 5.5 V or GND
(DIR, OE
)
0 to 5.5 ± 0.1 ± 1.0 μA
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high−impedance cir-
cuit. For proper operation, V
in
and
V
out
should be constrained to the
range GND v (V
in
or V
out
) v V
CC
.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or V
CC
).
Unused outputs must be left open.
P1-P3P4-P6P7-P8

MC74VHC245DTR2G

Mfr. #:
Buy MC74VHC245DTR2G
Manufacturer:
ON Semiconductor
Description:
Bus Transceivers 2-5.5V Octal Bus Transceiver
Lifecycle:
New from this manufacturer.
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