87946AYI-01LFT Datasheet 87946AYI-01LFT, 87946AYI-01LF | P10-P12

87946I-01 Datasheet

LVPECL Clock Input Interface

The PCLK /nPCLK accepts LVPECL, CML, SSTL and other

differential signals. The differential signal must meet the V

and

CMR

input requirements. Figures 2A to 2E show interface examples

for the PCLK/nPCLK input driven by the most common driver types.

The input interfaces suggested here are examples only. If the driver

is from another vendor, use their termination recommendation.

Please consult with the vendor of the driver component to confirm the

driver termination requirements.

Figure 2A. PCLK/nPCLK Input

Driven by a CML Driver

Figure 2C. PCLK/nPCLK Input

Driven by a 3.3V LVPECL Driver

Figure 2E. PCLK/nPCLK Input

Driven by an SSTL Driver

Figure 2B. PCLK/nPCLK Input

Driven by a Built-In Pullup CML Driver

Figure 2D. PCLK/nPCLK Input Driven by

a 3.3V LVPECL Driver with AC Couple

Figure 2F. PCLK/nPCLK Input Driven by

a 3.3V LVDS Driver

PCLK

nPCLK

LVPECL

Input

CML

3.3V

Zo = 50Ω

3.3V

50Ω

125

3.3V

Zo = 50

PCLK

nPCLK

3.3V

LVPECL

Input

PCLK

nPCLK

LVPECL

Input

SSTL

2.5V

Zo = 60

2.5V

3.3V

120

3.3V

100

CML Built-In Pullup

PCLK

nPCLK

3.3V

LVPEC

Input

Zo = 50

87946I-01 Datasheet

Reliability Information

Table 6. 

vs. Air Flow Table for a 32 Lead LQFP

Transistor Count

The transistor count for 87946I-01 is: 1204



vs. Air Flow

Linear Feet per Minute 0 200 500

Single-Layer PCB, JEDEC Standard Test Boards 67.8°C/W 55.9°C/W 50.1°C/W

Multi-Layer PCB, JEDEC Standard Test Boards 47.9°C/W 42.1°C/W 39.4°C/W

NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.

87946I-01 Datasheet

Package Outline and Package Dimension

Package Outline - Y Suffix for 32 Lead LQFP

Table 7. Package Dimensions for 32 Lead LQFP

Reference Document: JEDEC Publication 95, MS-026

JEDEC Variation: BBC - HD

All Dimensions in Millimeters

Symbol Minimum Nominal Maximum

N 32

A 1.60

A1 0.05 0.10 0.15

A2 1.35 1.40 1.45

b 0.30 0.37 0.45

c 0.09 0.20

D & E 9.00 Basic

D1 & E1 7.00 Basic

D2 & E2 5.60 Ref.

e 0.80 Basic

L 0.45 0.60 0.75

 0° 7°

ccc 0.10

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15

87946AYI-01LFT

Mfr. #:

Buy 87946AYI-01LFT

Manufacturer:

IDT

Description:

Clock Generators & Support Products 10 LVCMOS OUT BUFFER/DIVIDER

Lifecycle:

New from this manufacturer.

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87946AYI-01LFT

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