MC74HC174AN

Semiconductor Components Industries, LLC, 2001
May, 2001 – Rev. 8
1 Publication Order Number:
MC74HC174A/D
MC74HC174A
Hex D Flip-Flop with
Common Clock and Reset
High–Performance Silicon–Gate CMOS
The MC74HC174A is identical in pinout to the LS174. The device
inputs are compatible with standard CMOS outputs; with pull–up
resistors, they are compatible with LSTTL outputs.
This device consists of six D flip–flops with common Clock and
Reset inputs. Each flip–flop is loaded with a low–to–high transition of
the Clock input. Reset is asynchronous and active–low.
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2 to 6 V
Low Input Current: 1.0 A
In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
Chip Complexity: 162 FETs or 40.5 Equivalent Gates
Figure 1. Pin Assignment
13
14
15
16
9
10
11
125
4
3
2
1
8
7
6
Q4
D4
D5
Q5
V
CC
CLOCK
Q3
D3
D1
D0
Q0
RESET
GND
Q2
D2
Q1
FUNCTION TABLE
Inputs Output
Reset Clock D Q
L X X L
H H H
H L L
H L X No Change
H X No Change
2500/ReelTSSOP–16
SOIC–16MC74HC174ADR2
http://onsemi.com
MARKING
DIAGRAMS
Device Package Shipping
ORDERING INFORMATION
MC74HC174AN PDIP–16 2000/Box
MC74HC174AD SOIC–16
48/Rail
2500/Reel
SO–16
D SUFFIX
CASE 751B
1
16
PDIP–16
N SUFFIX
CASE 648
1
16
1
16
MC74HC174AN
AWLYYWW
1
16
HC174A
AWLYWW
A = Assembly Location
L, WL = Wafer Lot
Y, YY = Year
W, WW = Work Week
TSSOP–16
DT SUFFIX
CASE 948F
1
16
HC
174A
ALYW
1
16
MC74HC174ADT TSSOP–16 96/Rail
MC74HC174ADTR2
MC74HC174A
http://onsemi.com
2
Figure 2. Logic Diagram
PIN 16 = V
CC
PIN 8 = GND
3
4
6
11
13
14
2
5
7
10
12
15
D0
D1
D2
D3
D4
D5
Q0
Q1
Q2
Q3
Q4
Q5
CLOCK
9
RESET
1
DATA
INPUTS
NONINVERTING
OUTPUTS
DESIGN/VALUE TABLE
Design Criteria Value Units
Internal Gate Count* 40.5 ea.
Internal Gate Propagation Delay 1.5 ns
Internal Gate Power Dissipation 5.0 W
Speed Power Product .0075 pJ
*Equivalent to a two–input NAND gate.
MC74HC174A
http://onsemi.com
3
MAXIMUM RATINGS (Note 1)
Symbol Parameter Value Unit
V
CC
DC Supply Voltage (Referenced to GND) 0.5 to 7.0 V
V
IN
DC Input Voltage (Referenced to GND) 1.5 to V
CC
1.5 V
V
OUT
DC Output Voltage (Referenced to GND) (Note 2) 0.5 to V
CC
0.5 V
I
IN
DC Input Current, per Pin 20 mA
I
OUT
DC Output Current, per Pin 25 mA
I
CC
DC Supply Current, V
CC
and GND Pins 50 mA
T
STG
Storage Temperature Range 65 to 150 C
T
L
Lead Temperature, 1 mm from Case for 10 Seconds PDIP, SOIC, TSSOP 260 C
T
J
Junction Temperature Under Bias 150 C
JA
Thermal Resistance PDIP
SOIC
TSSOP
78
112
148
C/W
P
D
Power Dissipation in Still Air at 85C PDIP
SOIC
TSSOP
750
500
450
mW
MSL Moisture Sensitivity Level 1
F
R
Flammability Rating Oxygen Index: 30% – 35% UL–94–VO (0.125 in)
V
ESD
ESD Withstand Voltage Human Body Model (Note 3)
Machine Model (Note 4)
Charged Device Model (Note 5)
2000
100
500
V
I
LATCH–UP
Latch–Up Performance Above V
CC
and Below GND at 85C (Note 6) 300 mA
1. Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Extended exposure to these
conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum–rated
conditions is not implied.
2. I
O
absolute maximum rating must be observed.
3. Tested to EIA/JESD22–A114–A.
4. Tested to EIA/JESD22–A115–A.
5. Tested to JESD22–C101–A.
6. Tested to EIA/JESD78.
7. For high frequency or heavy load considerations, see the ON Semiconductor High–Speed CMOS Data Book (DL129/D).
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
V
CC
DC Supply Voltage (Referenced to GND) 2.0 6.0 V
V
IN
, V
OUT
DC Input Voltage, Output Voltage (Referenced to GND) (Note 8) 0 V
CC
V
T
A
Operating Temperature, All Package Types 55 125 C
t
r
, t
f
Input Rise and Fall Time (Figure 4) V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
0
0
0
1000
500
400
ns
8. Unused inputs may not be left open. All inputs must be tied to a high– or low–logic input voltage level.

MC74HC174AN

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
IC FF D-TYPE SNGL 6BIT 16DIP
Lifecycle:
New from this manufacturer.
Delivery:
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