4
FN9168.2
September 22, 2006
ISL6549
Absolute Maximum Ratings Thermal Information
VCC12 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .GND - 0.3V to +14V
PVCC5, VCC5 . . . . . . . . . . . . . . . . . . . . . . . . . . .GND - 0.3V to +7V
VCC5 (if used with external supply). . . . . . . . . . .GND - 0.3V to +6V
BOOT. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .GND - 0.3V to +27V
PHASE. . . . . . . . . . . . . . . . . . . . . . . . V
BOOT
- 7V to V
BOOT
+ 0.3V
V
BOOT
- V
PHASE
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+7V
UGATE. . . . . . . . . . . . . . . . . . . . . . V
PHASE
- 0.3V to V
BOOT
+ 0.3V
LGATE . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to PVCC5 + 0.3V
LDO_DR . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to VCC12 + 0.3V
FB, LDO_FB, COMP, FS_DIS . . . . . . . GND - 0.3V to VCC5 + 0.3V
ESD Classification
Human Body Model (Per JESD22-A114C) . . . . . . . . . . . . . .Class 2
Machine Model (Per EIA/JESD22-A115-A) . . . . . . . . . . . . . .Class B
Charge Device Model (Per JESD22-C101C). . . . . . . . . . . . Class IV
Thermal Resistance θ
JA
(°C/W) θ
JC
(°C/W)
SOIC Package (Note 1) . . . . . . . . . . . . 105 N/A
QFN Package (Notes 2, 3). . . . . . . . . . 52 14
QSOP Package (Note 1) . . . . . . . . . . . 110 N/A
Maximum Junction Temperature (Plastic Package) . . . . . . +150°C
Maximum Storage Temperature Range. . . . . . . . . -65°C to +150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . +300°C
(SOIC - Lead Tips Only)
Recommended Operating Conditions
External Supply Voltage on VCC5. . . . . . . . . . . . . . . . . . +5.0V ±5%
Supply Voltage on VCC12 . . . . . . . . . . . . . . . . . . . . . . . +12V ±10%
Ambient Temperature Range (C). . . . . . . . . . . . . . . . . . 0°C to 70°C
Ambient Temperature Range (I) . . . . . . . . . . . . . . . . -40°C to +85°
Junction Temperature Range. . . . . . . . . . . . . . . . . . . 0°C to +125°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. θ
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
2. θ
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
3. For θ
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications Recommended Operating Conditions, unless otherwise noted. VCC12 = 12V
Temperature = 0 to +70°C (typical = +25°C) for Commercial; Temperature = -40 to + 85°C (typical = +25°C) for
Industrial. Refer to Block Diagram, Simplified Power System Diagram, and Typical Application Schematic.
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
VCC SUPPLY CURRENT
Nominal Supply Current VCC12 (disabled) I
CC12 dis
UGATE, LGATE and LDO_DR open;
FS_DIS = GND
23mA
Nominal Supply Current VCC5 (disabled) I
CC5 dis
UGATE, LGATE and LDO_DR open;
FS_DIS = GND (Note 4)
57.5mA
Nominal Supply Current VCC12
(includes PVCC5 current)
I
CC12
UGATE, LGATE and LDO_DR open;
F
OSC
= 620kHz
12 18 mA
Nominal Supply Current VCC5 I
CC5
UGATE, LGATE and LDO_DR open;
F
OSC
= 620kHz
46mA
Maximum PVCC5 Current Available (Note 5) I
PVCC5
100 mA
VCC12 to PVCC5 Current Limit (Note 5) I
PVCC5CL
150 mA
PVCC5 Voltage V
PVCC5
ISL6549C; No external load 4.95 5.25 5.8 V
ISL6549I; No external load 4.85 5.25 5.8
POWER-ON RESET
Rising VCC5 Threshold VCC12 = 12V 3.7 4.2 4.5 V
Falling VCC5 Threshold VCC12 = 12V 3.3 3.8 4.1 V
Rising VCC12 Threshold VCC5 = 5V 8.8 9.5 10.0 V
Falling VCC12 Threshold VCC5 = 5V 7.0 7.5 8.0 V
OSCILLATOR AND SOFT-START
Switching Frequency F
OSC
ISL6549C; R
FS_DIS
= 45.3k 540 620 700 kHz
ISL6549I; R
FS_DIS
= 45.3k 525 620 700 kHz
5
FN9168.2
September 22, 2006
ISL6549
Sawtooth Amplitude (Note 6) DV
OSC
1.5 V
Soft-Start Interval T
SS
F
OSC
= 620kHz 6.8 ms
REFERENCE VOLTAGE
Reference Voltage V
REF
ISL6549C; For Error Amp 1 and 2 0.792 0.8 0.808 V
ISL6549I; For Error Amp 1 and 2 0.788 0.8 0.812 V
PWM CONTROLLER ERROR AMPLIFIER
DC Gain (Note 6) R
L
= 10K, C
L
= 10pF 96 dB
Gain-Bandwidth Product (Note 6) GBWP R
L
= 10K, C
L
= 10pF 20 MHz
Slew Rate (Note 6) SR R
L
= 10K, C
L
= 10pF 8 V/µs
FB Input Current I
I
V
FB
= 0.8V 0.1 1.0 µA
COMP High Output Voltage V
OUT
High 4.8 V
COMP Low Output Voltage V
OUT
Low 0.6 V
COMP High Output, Source Current I
OUT
High -2.8 mA
Undervoltage Level (V
FB
/V
REF
)V
UV
70 75 80 %
PWM CONTROLLER GATE DRIVERS
UGATE Maximum Voltage V
HUGATE
VCC12 = 12V; PHASE = 12V 17 17.5 18
LGATE Maximum Voltage V
HLGATE
VCC12 = 12V; based on PVCC5 voltage 5.25 6 V
UGATE and LGATE Minimum Voltage V
LGATE
VCC12 = 12V; PHASE = 0V 0 0.5 V
UGATE Source Output Impedance R
DS(ON)
VCC12 = 12V; I
GATE
= 100mA 0.8
UGATE Sink Output Impedance R
DS(ON)
VCC12 = 12V; I
GATE
= 100mA 0.7
LGATE Source Output Impedance R
DS(ON)
VCC12 = 12V; I
GATE
= 100mA 0.8
LGATE Sink Output Impedance R
DS(ON)
VCC12 = 12V; I
GATE
= 100mA 0.4
LINEAR REGULATOR (LDO_DR)
DC Gain (Note 6) Gain R
L
= 10K, C
L
= 10pF 100 dB
Gain-Bandwidth Product (Note 6) GBWP R
L
= 10K, C
L
= 10pF 2 MHz
Slew Rate (Note 6) SR R
L
= 10K, C
L
= 10pF 6 V/µs
LDO_FB Input Current I
I
V
LDO_FB
= 0.8V 0.1 1.0 µA
LDO_DR High Output Voltage V
OUT
High VCC12 = 12V 11.0 11.5 V
LDO_DR Low Output Voltage V
OUT
Low 0.0 0.5 V
LDO_DR High Output Source Current I
OUT
High V
OUT
= 2.0V 2.0 mA
LDO_DR Low Output Sink Current I
OUT
Low 0.5 mA
Undervoltage Level (V
LDO_FB
/V
REF
)V
UV
Percent of Nominal 70 75 80 %
NOTES:
4. Current in VCC5 is actually higher disabled, due to extra current required to pull down against the FS_DIS pin. VCC12 current is lower disabled.
5. Guaranteed by design, not production tested. Exceeding the maximum current from PVCC5 may result in degraded performance and unsafe
operation.
6. Guaranteed by design, not production tested.
Electrical Specifications Recommended Operating Conditions, unless otherwise noted. VCC12 = 12V
Temperature = 0 to +70°C (typical = +25°C) for Commercial; Temperature = -40 to + 85°C (typical = +25°C) for
Industrial. Refer to Block Diagram, Simplified Power System Diagram, and Typical Application Schematic.
(Continued)
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
6
FN9168.2
September 22, 2006
Functional Pin Description
VCC12
This is the power supply pin for the IC; it sources the internal
5V regulator used for the gate drivers. Provide a local
decoupling capacitor to GND. The voltage at this pin is
monitored for Power-On Reset (POR) purposes. The
16 Ld QFN and 16 Ld QSOP have two VCC12 pins; tie them
together on the board.
VCC5
This pin supplies the internal 5V bias for analog and logic
functions. Provide a local decoupling capacitor to GND, and a
resistor to PVCC. The voltage at this pin is monitored for
Power-On Reset (POR) purposes. See “Internal PVCC5
Regulator” on page 7 for more details.
GND, AGND, DGND
These pins are the signal ground for the IC. All voltage levels
are measured with respect to these pins. Connect all to the
ground plane via the shortest available path.
PVCC5
This pin is the internal 5V linear regulator for the BOOT supply
(for the UGATE driver), and the source for the LGATE.
Provide a local decoupling capacitor to PGND. Do not use this
pin as a voltage source for other circuits. See “Internal PVCC5
Regulator” on page 7 for more details.
PGND
This pin is the power ground return for the lower gate driver.
(LGATE). Connect to the ground plane on the board via the
shortest available path.
UGATE
This output pin drives the upper MOSFET gate from the
internal 5V regulator. Connect it to the gate of the upper
MOSFET via a short, low inductance trace.
BOOT
The BOOT pin, along with the external capacitor (from
PHASE to BOOT), an internal diode, and the internal 5.5V
regulator, creates the bootstrap voltage for the upper gate
driver (UGATE). The maximum voltage is around 5.5V (above
PHASE).
PHASE
This pin represents the return path for the upper gate drive.
Connect it to the source of the upper MOSFET via a short, low
inductance trace.
LGATE
This output pin drives the lower MOSFET gate from the
internal 5V regulator. Connect it to the gate of the lower
MOSFET via a short, low inductance trace.
FB
FB is the available external inverting input pin of the error
amplifier. Connect the output of the switching regulator to
this pin through a properly sized resistor divider, to set the
output voltage. The voltage at this pin is regulated to the
internal reference voltage. This pin is also monitored for
undervoltage detection.
COMP
COMP is the available external output pin of the error amplifier.
This pin is used to compensate the voltage-mode control
feedback loop of the standard synchronous rectified buck
converter. Connect an appropriate compensation network
between this and the FB pin. See “PWM Controller Feedback
Compensation” on page 10 for more information.
FS_DIS
This input pin has two functions. A resistor to GND sets the
internal oscillator frequency for the switching regulator. In
addition, if the pin is pulled down towards GND with a low
impedance (<1k, such as an external FET), it will disable
both regulator outputs until released (at which time a new soft-
start cycle will begin).
LDO_DR
This output pin provides the gate voltage for the linear
regulator pass transistor. Connect this pin to the gate terminal
of an external N-channel MOSFET transistor. This pin (along
with the LDO_FB pin) also provides a means of compensating
the error amplifier, should the application require it.
LDO_FB
This input pin is the FB inverting input on the linear regulator
error amplifier. Connect the output of the linear regulator to
this pin through a properly sized resistor divider, to set the
output voltage. The voltage at this pin is regulated to the
internal reference voltage. This pin is also monitored for
undervoltage detection.
Bottom Pad (QFN Package Only)
The QFN package’s metal bottom pad is resistively tied to the
internal IC GND. For best thermal and electrical performance,
connect this pad to the GND pins, and to the ground plane of
the PCB through 4 vias equidistantly situated inside the solder
landing pad.
ISL6549

ISL6549IBZ-T

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Switching Controllers SINGLE 12V SUPPLY DLG 14LD N
Lifecycle:
New from this manufacturer.
Delivery:
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