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ISL6552CB

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18
13
controller is under full load. This droop compensation allows
larger transient voltage deviations and thus reduces the size
and cost of the output filter components.
R
IN
should be selected to give the desired “droop” voltage at
the normal full load current 50A applied through the R
ISEN
resistor (or at a different full load current if adjusted as
outlined in the Over-Current, Selecting R
ISEN
section).
R
IN
= Vdroop/50A
For a Vdroop of 80mV, R
IN
= 1.6k
The AC feedback components, R
FB
and Cc, are scaled in
relation to R
IN
.
Current Balancing
The detected currents are also used to balance the phase
currents.
Each phase’s current is compared to the average of all
phase currents, and the difference is used to create an offset
in that phase’s PWM comparator. The offset is in a direction
to reduce the imbalance.
The balancing circuit can not make up for a difference in
r
DS(ON)
between synchronous rectifiers. If a FET has a higher
r
DS(ON)
, the current through that phase will be reduced.
Figures 8 and 9 show the inductor current of a two phase
system without and with current balancing.
Inductor Current
The inductor current in each phase of a multi-phase Buck
converter has two components. There is a current equal to
the load current divided by the number of phases (I
LT
/ n),
and a sawtooth current, (i
PK-PK
) resulting from switching.
The sawtooth component is dependent on the size of the
inductors, the switching frequency of each phase, and the
values of the input and output voltage. Ignoring secondary
effects, such as series resistance, the peak to peak value of
the sawtooth current can be described by:
i
PK-PK
= (V
IN
x V
CORE
- V
CORE
2
)/(L x F
SW
x V
IN
)
Where: V
CORE
= DC value of the output or V
ID
voltage
V
IN
= DC value of the input or supply voltage
L = value of the inductor
F
SW
= switching frequency
Example: For V
CORE
= 1.6V,
V
IN
= 12V,
L = 1.3H,
F
SW
= 250kHz,
Then i
PK-PK
= 4.3A
The inductor, or load current, flows alternately from V
IN
through Q1 and from ground through Q2. The ISL6552
samples the on-state voltage drop across each Q2 transistor
to indicate the inductor current in that phase. The voltage
drop is sampled 1/3 of a switching period, i/F
SW
, after Q1 is
turned OFF and Q2 is turned on. Because of the sawtooth
current component, the sampled current is different from the
average current per phase. Neglecting secondary effects,
the sampled current (I
SAMPLE
) can be related to the load
current (I
LT
) by:
I
SAMPLE
=
I
LT
/ n +
(V
IN
V
CORE
-3V
CORE
2
)/(6L x F
SW
x V
IN
)
Where: I
LT
= total load current
n = the number of channels
Example: Using the previously given conditions, and
For I
LT
= 100A,
n = 4
Then I
SAMPLE
= 25.49A
As discussed previously, the voltage drop across each Q2
transistor at the point in time when current is sampled is
r
DSON
(Q2) x I
SAMPLE
. The voltage at Q2’s drain, the
PHASE node, is applied through the R
ISEN
resistor to the
ISL6552 ISEN pin. This pin is held at virtual ground, so the
current into ISEN is:
I
SENSE
= I
SAMPLE
x r
DS(ON)
(Q2)/R
ISEN
.
R
Isen
= I
SAMPLE
x r
DS(ON)
(Q2)/50A
0
5
10
15
20
25
AMPERES
FIGURE 8. TWO CHANNEL MULTI-PHASE SYSTEM WITH
CURRENT BALANCING DISABLED
0
5
10
15
20
25
AMPERES
FIGURE 9. TWO CHANNEL MULTI-PHASE SYSTEM WITH
CURRENT BALANCING ENABLED
ISL6552
14
Example: From the previous conditions,
where: I
LT
= 100A,
I
SAMPLE
= 25.49A,
r
DS(ON)
(Q2) = 4m
Then: R
ISEN
= 2.04K and
I
CURRENT TRIP
= 165%
Short circuit I
LT
= 165A.
Channel Frequency Oscillator
The channel oscillator frequency is set by placing a resistor,
R
T
, to ground from the FS/DIS pin. Figure 10 is a curve
showing the relationship between frequency, F
SW,
and
resistor R
T
. To avoid pickup by the FS/DIS pin, it is important
to place this resistor next to the pin.
Layout Considerations
MOSFETs switch very fast and efficiently. The speed with which
the current transitions from one device to another causes
voltage spikes across the interconnecting impedances and
parasitic circuit elements. These voltage spikes can degrade
efficiency, radiate noise into the circuit and lead to device over-
voltage stress. Careful component layout and printed circuit
design minimizes the voltage spikes in the converter. Consider,
as an example, the turnoff transition of the upper PWM
MOSFET. Prior to turnoff, the upper MOSFET was carrying
channel current. During the turnoff, current stops flowing in the
upper MOSFET and is picked up by the lower MOSFET. Any
inductance in the switched current path generates a large
voltage spike during the switching interval. Careful component
selection, tight layout of the critical components, and short, wide
circuit traces minimize the magnitude of voltage spikes. Contact
Intersil for evaluation board drawings of the component
placement and printed circuit board.
There are two sets of critical components in a DC-DC
converter using a ISL6552 controller and a HIP6601 gate
driver. The power components are the most critical because
they switch large amounts of energy. Next are small signal
components that connect to sensitive nodes or supply critical
bypassing current and signal coupling.
The power components should be placed first. Locate the
input capacitors close to the power switches. Minimize the
length of the connections between the input capacitors, C
IN
,
and the power switches. Locate the output inductors and
output capacitors between the MOSFETs and the load.
Locate the gate driver close to the MOSFETs.
The critical small components include the bypass capacitors
for VCC and PVCC on the gate driver ICs. Locate the
bypass capacitor, C
BP
, for the ISL6552 controller close to
the device. It is especially important to locate the resistors
associated with the input to the amplifiers close to their
respective pins, since they represent the input to feedback
amplifiers. Resistor R
T
, that sets the oscillator frequency
should also be located next to the associated pin. It is
especially important to place the R
SEN
resistors at the
respective terminals of the ISL6552.
A multi-layer printed circuit board is recommended. Figure 11
shows the connections of the critical components for one
output channel of the converter. Note that capacitors C
IN
and
C
OUT
could each represent numerous physical capacitors.
Dedicate one solid layer, usually the middle layer of the PC
board, for a ground plane and make all critical component
ground connections with vias to this layer. Dedicate another
solid layer as a power plane and break this plane into smaller
islands of common voltage levels. Keep the metal runs from
the PHASE terminal to output inductor short. The power plane
should support the input power and output power nodes. Use
copper filled polygons on the top and bottom circuit layers for
the phase nodes. Use the remaining printed circuit layers for
small signal wiring. The wiring traces from the driver IC to the
MOSFET gate and source should be sized to carry at least
one ampere of current.
Component Selection Guidelines
Output Capacitor Selection
The output capacitor is selected to meet both the dynamic
load requirements and the voltage ripple requirements. The
load transient for the microprocessor CORE is characterized
by high slew rate (di/dt) current demands. In general,
multiple high quality capacitors of different size and dielectric
are paralleled to meet the design constraints.
Modern microprocessors produce severe transient load rates.
High frequency capacitors supply the initially transient current
and slow the load rate-of-change seen by the bulk capacitors.
The bulk filter capacitor values are generally determined by
50 10010 20 200 500 1,000 5,000 10,0002,000
1
2
5
10
20
50
100
200
500
1,000
R
T
(k)
CHANNEL OSCILLATOR FREQUENCY, F
SW
(kHz)
FIGURE 10. RESISTANCE R
T
vs FREQUENCY
ISL6552
15
the ESR (effective series resistance) and voltage rating
requirements rather than actual capacitance requirements.
High frequency decoupling capacitors should be placed as
close to the power pins of the load as physically possible. Be
careful not to add inductance in the circuit board wiring that
could cancel the usefulness of these low inductance
components. Consult with the manufacturer of the load on
specific decoupling requirements.
Use only specialized low-ESR capacitors intended for
switching-regulator applications for the bulk capacitors. The
bulk capacitor’s ESR determines the output ripple voltage
and the initial voltage drop following a high slew-rate
transient’s edge. In most cases, multiple capacitors of small
case size perform better than a single large case capacitor.
Bulk capacitor choices include aluminum electrolytic, OS-
Con, Tantalum and even ceramic dielectrics. An aluminum
electrolytic capacitor’s ESR value is related to the case size
with lower ESR available in larger case sizes. However, the
equivalent series inductance (ESL) of these capacitors
increases with case size and can reduce the usefulness of
the capacitor to high slew-rate transient loading.
Unfortunately, ESL is not a specified parameter. Consult the
capacitor manufacturer and measure the capacitor’s
impedance with frequency to select a suitable component.
Output Inductor Selection
One of the parameters limiting the converter’s response to a
load transient is the time required to change the inductor
current. Small inductors in a multi-phase converter reduces
the response time without significant increases in total ripple
current.
The output inductor of each power channel controls the
ripple current. The control IC is stable for channel ripple
current (peak-to-peak) up to twice the average current. A
single channel’s ripple current is approximately:
The current from multiple channels tend to cancel each other
and reduce the total ripple current. Figure 12 gives the total
ripple current as a function of duty cycle, normalized to the
parameter at zero duty cycle. To determine
the total ripple current from the number of channels and the
duty cycle, multiply the y-axis value by .
Small values of output inductance can cause excessive
power dissipation. The ISL6552 is designed for stable
operation for ripple currents up to twice the load current.
However, for this condition, the RMS current is 115% above
the value shown in the following MOSFET Selection and
Considerations section. With all else fixed, decreasing the
inductance could increase the power dissipated in the
MOSFETs by 30%.
I
V
IN
V
OUT
–
F
SW
L
--------------------------------
V
OUT
V
IN
----------------
=
VoLxF
SW

VoLxF
SW

1.0
0.8
0.6
0.4
0.2
0
0
0.1 0.2 0.3 0.4 0.5
DUTY CYCLE (V
O
/V
IN
)
RIPPLE CURRENT (A
PEAK-PEAK
)
V
O
/ (L
X
F
SW
)
SINGLE
CHANNEL
2 CHANNEL
3 CHANNEL
4 CHANNEL
FIGURE 11. RIPPLE CURRENT vs DUTY CYCLE
V
CORE
+12V
VIA CONNECTION TO GROUND PLANE
ISLAND ON POWER PLANE LAYER
ISLAND ON CIRCUIT PLANE LAYER
L
O1
C
OUT
C
IN
+5V
IN
KEY
PHASE
VCC
USE INDIVIDUAL METAL RUNS
COMP
ISL6552
PWM
R
T
R
IN
R
FB
C
BP
FB
V
SEN
I
SEN
R
SEN
HIP6601
C
BOOT
C
BP
C
T
VCC
FS/DIS
PVCC
LOCATE NEXT TO IC PIN
LOCATE NEXT
TO FB PIN
LOCATE NEXT TO IC PIN(S)
ISOLATE OUTPUT STAGES
FOR EACH CHANNEL TO HELP
LOCATE NEAR TRANSISTOR
FIGURE 12. PRINTED CIRCUIT BOARD POWER PLANES AND ISLANDS
ISL6552
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18

ISL6552CB

Mfr. #:
Buy ISL6552CB
Manufacturer:
Renesas / Intersil
Description:
IC REG CTRLR BUCK 20SOIC
Lifecycle:
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