16
Input Capacitor Selection
The important parameters for the bulk input capacitors are the
voltage rating and the RMS current rating. For reliable
operation, select bulk input capacitors with voltage and current
ratings above the maximum input voltage and largest RMS
current required by the circuit. The capacitor voltage rating
should be at least 1.25 times greater than the maximum input
voltage and a voltage rating of 1.5 times is a conservative
guideline. The RMS current required for a multi-phase
converter can be approximated with the aid of Figure 13.
First determine the operating duty ratio as the ratio of the
output voltage divided by the input voltage. Find the Current
Multiplier from the curve with the appropriate power
channels. Multiply the current multiplier by the full load
output current. The resulting value is the RMS current rating
required by the input capacitor.
Use a mix of input bypass capacitors to control the voltage
overshoot across the MOSFETs. Use ceramic capacitance for
the high frequency decoupling and bulk capacitors to supply
the RMS current. Small ceramic capacitors should be placed
very close to the drain of the upper MOSFET to suppress the
voltage induced in the parasitic circuit impedances.
For bulk capacitance, several electrolytic capacitors (Panasonic
HFQ series or Nichicon PL series or Sanyo MV-GX or
equivalent) may be needed. For surface mount designs, solid
tantalum capacitors can be used, but caution must be
exercised with regard to the capacitor surge current rating.
These capacitors must be capable of handling the surge-
current at power-up. The TPS series available from AVX, and
the 593D series from Sprague are both surge current tested.
MOSFET Selection and Considerations
In high-current PWM applications, the MOSFET power
dissipation, package selection and heatsink are the
dominant design factors. The power dissipation includes two
loss components; conduction loss and switching loss. These
losses are distributed between the upper and lower
MOSFETs according to duty factor (see the following
equations). The conduction losses are the main component
of power dissipation for the lower MOSFETs, Q2 and Q4 of
Figure 1. Only the upper MOSFETs, Q1 and Q3 have
significant switching losses, since the lower device turns on
and off into near zero voltage.
The equations assume linear voltage-current transitions and
do not model power loss due to the reverse-recovery of the
lower MOSFETs body diode. The gate-charge losses are
dissipated by the Driver IC and don’t heat the MOSFETs.
However, large gate-charge increases the switching time,
t
SW
which increases the upper MOSFET switching losses.
Ensure that both MOSFETs are within their maximum
junction temperature at high ambient temperature by
calculating the temperature rise according to package
thermal-resistance specifications. A separate heatsink may
be necessary depending upon MOSFET power, package
type, ambient temperature and air flow.
A diode, anode to ground, may be placed across Q2 and Q4
of Figure 1. These diodes function as a clamp that catches
the negative inductor swing during the dead time between
the turn off of the lower MOSFETs and the turn on of the
upper MOSFETs. The diodes must be a Schottky type to
prevent the lossy parasitic MOSFET body diode from
conducting. It is usually acceptable to omit the diodes and let
the body diodes of the lower MOSFETs clamp the negative
inductor swing, but efficiency could drop one or two percent
as a result. The diode's rated reverse breakdown voltage
must be greater than the maximum input voltage.
References
Intersil documents are available on the web at
www.intersil.com/
[1] HIP6601/HIP6603 Data Sheet, Intersil Corporation,
File No. 4819
[2] HIP6602 Data Sheet, Intersil Corporation, File No. 4838
0.5
0.4
0.3
0.2
0.1
0
0
0.1 0.2 0.3 0.4 0.5
DUTY CYCLE (V
O
/V
IN
)
CURRENT MULTIPLIER
SINGLE
CHANNEL
3 CHANNEL
4 CHANNEL
2 CHANNEL
FIGURE 13. CURRENT MULTIPLIER vs DUTY CYCLE
P
UPPER
I
O
2
r
DS ON
V
OUT
V
IN
------------------------------------------------------------
I
O
V
IN
t
SW
F
SW
2
----------------------------------------------------------
+=
P
LOWER
I
O
2
r
DS ON
V
IN
V
OUT
–
V
IN
---------------------------------------------------------------------------------
=
ISL6552
