4
Simplified Power System Diagram
Functional Pin Description
VID3, VID2, VID1, VID0 and VID25mV
Voltage Identification inputs from microprocessor. These pins
respond to TTL and 3.3V logic signals. The ISL6552 decodes
VID bits to establish the output voltage. See Table 1.
COMP
Output of the internal error amplifier. Connect this pin to the
external feedback and compensation network.
FB
Inverting input of the internal error amplifier.
FS/DIS
Channel frequency, F
SW
, select and disable. A resistor from
this pin to ground sets the switching frequency of the
converter. Pulling this pin to ground disables the converter
and three states the PWM outputs. See Figure 10.
GND
Bias and reference ground. All signals are referenced to this
pin.
VSEN
Power good monitor input. Connect to the microprocessor-
CORE voltage.
PWM1, PWM2, PWM3 and PWM4
PWM outputs for each driven channel in use. Connect these
pins to the PWM input of a HIP6601, HIP6602, HIP6603
driver. For systems which use 3 channels, connect PWM4
high. Two channel systems connect PWM3 and PWM4 high.
SYNCHRONOUS
ISL6552
MICROPROCESSOR
VSEN
VID
RECTIFIED BUCK
CHANNEL
SYNCHRONOUS
RECTIFIED BUCK
CHANNEL
SYNCHRONOUS
RECTIFIED BUCK
CHANNEL
SYNCHRONOUS
RECTIFIED BUCK
CHANNEL
PWM 1
PWM 2
PWM 3
PWM 4
11
12
13
14
15
16
17
18
20
19
10
9
8
7
6
5
4
3
2
1
VID3
VID2
VID1
VID0
VID25mV
FS/DIS
PWM2
PGOOD
PWM3
ISEN4
ISEN1
VCC
GND
ISEN3
FB
PWM4
VSEN
COMP
PWM1
ISEN2
ISL6552CB (20 LEAD SOIC)
ISL6552CR (20 LEAD 5x5 QFN)
VID1
VID25mV
COMP
FB
GND
PWM3
ISEN3
VID2
PGOOD
PWM1
ISEN4
ISEN1
VCC
PWM2
VSEN
FS/DIS
VID0
ISEN2
VID3
GND
PWM4
1
2
3
4
5
678910
15
14
13
12
11
20 19 18 17 16
ISL6552
