Quad Channel 1°C Temperature Sensor with Beta Compensation and 1.8V SMBus Communications
Datasheet
SMSC EMC1184 39 Revision 1.0 (07-11-13)
DATASHEET
For CPU substrate transistors that require the BJT transistor model, the ideality factor behaves slightly
differently than for discrete diode-connected transistors. Refer to Table 6.19 when using a CPU
substrate transistor.
APPLICATION NOTE: When measuring a 65nm Intel CPU, the Ideality Setting should be the default 12h. When
measuring a 45nm Intel CPU, the Ideality Setting should be 15h.
16h 1.0133 26h 1.0345 36h 1.0553
17h 1.0146 27h 1.0358 37h 1.0566
Table 6.19 Substrate Diode Ideality Factor Look-Up Table (BJT Model)
SETTING FACTOR SETTING FACTOR SETTING FACTOR
08h 0.9869 18h 1.0079 28h 1.0291
09h 0.9882 19h 1.0092 29h 1.0304
0Ah 0.9895 1Ah 1.0105 2Ah 1.0317
0Bh 0.9908 1Bh 1.0120 2Bh 1.0330
0Ch 0.9921 1Ch 1.0132 2Ch 1.0343
0Dh 0.9934 1Dh 1.0146 2Dh 1.0356
0Eh 0.9947 1Eh 1.0159 2Eh 1.0369
0Fh 0.9960 1Fh 1.0173 2Fh 1.0382
10h 0.9973 20h 1.0187 30h 1.0395
11h 0.9986 21h 1.0200 31h 1.0408
12h 1.0000 22h 1.0213 32h 1.0421
13h 1.0013 23h 1.0226 33h 1.0434
14h 1.0026 24h 1.0239 34h 1.0447
15h 1.0039 25h 1.0252 35h 1.0460
16h 1.0053 26h 1.0265 36h 1.0473
17h 1.0066 27h 1.0278 37h 1.0486
Table 6.18 Ideality Factor Look-Up Table (Diode Model) (continued)
SETTING FACTOR SETTING FACTOR SETTING FACTOR