NCP1526
http://onsemi.com
13
Table 3. List of Inductors
FDK MIPW3226 series
TDK
VLF3010AT series
TFC252005 series
Taiyo Yuden LQ CBL2012
Coil craft
DO1605−T series
LPO3008
Output capacitor selection
Selecting the proper output capacitor is based on the
desired output ripple voltage. Ceramic capacitors with low
ESR values will have the lowest output ripple voltage and
are strongly recommended. The output capacitor requires
either an X7R or X5R dielectric.
The output ripple voltage in PWM mode is given by:
DV
out
+ DI
L
ǒ
1
4 f
sw
C
out
) ESR
Ǔ
Table 4. List of Output Capacitors
Murata GRM188R60J475KE 4.7 mF
GRM21BR71C475KA
GRM188R60OJ106ME 10 mF
Taiyo Yuden JMK212BY475MG 4.7 mF
JMK212BJ106MG 10 mF
TDK C2012X5ROJ475KB 4.7 mF
C1632X5ROJ475KT
C2012X5ROJ106K 10 mF
OUTPUT VOLTAGE OPTIONS AVAILABLE UPON
REQUEST
DC/DC Converter
Fixed Output Voltage (V)
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.5
2.7
3.0
3.3
LDO Operation
Voltage Regulator V1
V1 is a 2.80 V, 3% low drop voltage regulator dedicated
to RF sensitive module. It can deliver up to 150 mA and is
totally protected against short to ground (current
limitation) and overtemperature (thermal shutdown circuit
with hysteresis).
The PSRR of the reference is in excess of 67 dB at
1.0 kHz. The output of the V1 requires a 1.0 mF capacitor
for stability. An additional 100 nF capacitor is necessary on
the BYPASS pin for a low output noise. If the BYPASS pin
is supporting an additional load, the stability and
performance of the V1 will be diminished. Since the input
voltage can go as low as 3.0 V, the reference output will be
affected and can drop as low as 150 mV below the input
voltage at 150 mA output current. During this low dropout,
the PSRR of the reference is reduced. V1 is active when
logic high is applied to the EN2 pin. It is turned off by a
logic low on the EN2 pin.
Reference Bypass Capacitor Node (Bypass)
An optional 100 nF BYPASS capacitor creates a low pass
filter for LDO noise reduction. The output voltage noise is
45 mV
RMS
with C
BYPASS
= 0.1 mF and C
OUT
= 1.0 mF. If the
BYPASS pin is supporting an additional load, the stability
and performance of the NCP1526 will be diminished.
Current Limiting
The output voltage regulator limits the output current to
I
SC
= 300 mA (typ). If the LDO output current exceeds I
SC
,
the output voltage drops.
Shutdown Mode
When the EN2 pin has a voltage applied of less than
0.4 V, the output voltage regulator will be disabled. In
shutdown mode, the internal reference and most of the
control circuitries are turned off. Therefore, the typical
current consumption will be 0.2 mA (typical value).
Applying a voltage above 1.2 V to EN2 pin will enable the
LDO for normal operation.
OUTPUT VOLTAGE OPTIONS AVAILABLE UPON
REQUEST
LDO
Fixed Output Voltage (V)
2.5
2.6
2.7
2.8
2.85
3.0
3.1
3.3
NCP1526
http://onsemi.com
14
APPLICATION BOARD
PCB Layout Recommendations
Good PCB layout plays an important role in switching
mode power conversion. Careful PCB layout can help to
minimize ground bounce, EMI noise and unwanted
feedback that can affect the performance of the converter.
Hints suggested below can be used as a guideline in most
situations.
1. Use star−ground connection to connect the IC
ground nodes and capacitor GND nodes together
at one point. Keep them as close as possible, and
then connect this to the ground plane through
several vias. This will reduce noise in the ground
plane by preventing the switching currents from
flowing through the ground plane.
2. Place the power components (i.e., input capacitor,
inductor and output capacitor) as close together
as possible for best performance. All connecting
traces must be short, direct, and wide to reduce
voltage errors caused by resistive losses through
the traces.
3. Separate the feedback path of the output voltage
from the power path. Keep this path close to the
NCP1526 circuit. And also route it away from
noisy components. This will prevent noise from
coupling into the voltage feedback trace.
The following shows the NCP1526 demo board
schematic and layout and bill of materials:
Figure 25. NCP1526 Board Schematic
OFF ON
V
battery
C5
C4
C3C2
V
out
BUCK
L1
C1
V
out
LDO
10
BUCK
LDO
9
8
7
6
1
2
3
4
5
BYPASS
GND2
EN2
EN1
FB VIN1
LX
GND1
VIN2
V1
OFF ON
Figure 26. NCP1526 Board Layout
NCP1526
http://onsemi.com
15
U1
NCP1526
FB
1
EN1
2
EN2
3
GND2
4
BYPASS
5
V1
6
VIN2
7
GND1
8
LX
9
VIN1
10
EP
11
C2
100 n
C1
C5
C4
C3
L1
lx
0
0
bp
J5
HEADER 2
12
0
en1
en2
J12
BNC H
J13
CON3
1
2
3
0
en2
J8
JUMPER1
12
J11
JUMPER1
0
0
EN2
T POINT A
J7
HEADER 2
1
2
0
J6
HEADER 2
1
2
0
Figure 27. Schematics
12
4.7 m
V
out
1
4.7 m
V
in
4.7 m
1 m
2.2 mH
V
out
2
0
V
in
J9
BNC H
J10
CON3
1
2
3
0
en2
EN1
T POINT A
0
V
in
Figure 28. Board Layout (Top View)

NCP1526MUTXG

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Switching Voltage Regulators BUCK REG AND LDO
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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