www.austriamicrosystems.com/LDOs/AS1371 Revision 1.6 10 - 17
AS1371
Datasheet - Application Information
9 Application Information
9.1 Dropout Voltage
Dropout is the input to output voltage difference, below which the linear regulator ceases to regulate. At this point, the output voltage change
follows the input voltage change. Dropout voltage may be measured at different currents and, in particular at the regulator maximum one. From
this is obtained the MOSFET maximum series resistance over temperature etc. More generally:
(EQ 2)
Dropout is probably the most important specification when the regulator is used in a battery application. The dropout performance of the
regulator defines the useful “end of life” of the battery before replacement or re-charge is required.
Figure 15. Graphical Representation of Dropout Voltage
Figure 15 shows the variation of VOUT as VIN is varied for a certain load current. The practical value of dropout is the differential voltage (VOUT-
VIN) measured at the point where the LDO output voltage has fallen by 100mV below the nominal, fully regulated output value. The nominal
regulated output voltage of the LDO is that obtained when there is 500mV (or greater) input-output voltage differential.
9.2 Efficiency
Low quiescent current and low input-output voltage differential are important in battery applications amongst others, as the regulator efficiency is
directly related to quiescent current and dropout voltage. Efficiency is given by:
Efficiency = %(EQ 3)
Where:
I
Q
= Quiescent current of LDO
9.3 Power Dissipation
Maximum power dissipation (PD) of the LDO is the sum of the power dissipated by the internal series MOSFET and the quiescent current
required to bias the internal voltage reference and the internal error amplifier, and is calculated as:
Watts (EQ 4)
Internal power dissipation as a result of the bias current for the internal voltage reference and the error amplifier is calculated as:
Watts (EQ 5)
Total LDO power dissipation is calculated as:
Watts (EQ 6)
V
DROPOUT
I
LOAD
R
SERIES
=
Dropout
Voltage
100mV
V
IN
V
OUT
V
OUT
V
IN
V
OUT
V
IN
=V
OUT(TYP)
+0.5V
V
IN
V
LOAD
I
LOAD
V
IN
I
Q
I
LOAD
+
---------------------------------------
100
PD
MAX
SeriespassI
LOAD MAX
= V
IN MAX
V
OUT MIN

PD
MAX
BiasV
IN MAX
I
Q
=
PD
MAX
TotalPD
MAX
SeriespassPD
MAX
+ Bias=
www.austriamicrosystems.com/LDOs/AS1371 Revision 1.6 11 - 17
AS1371
Datasheet - Application Information
9.4 Junction Temperature
Under all operating conditions, the maximum junction temperature should not be allowed to exceed 125ºC (unless the data sheet specifically
allows). Limiting the maximum junction temperature requires knowledge of the heat path from junction to case (
JC
ºC/W fixed by the IC
manufacturer), and adjustment of the case to ambient heat path (
CA
ºC/W) by manipulation of the PCB copper area adjacent to the IC position.
Figure 16. Package Physical Arrangements
Figure 17. Steady State Heat Flow Equivalent Circuit
Total Thermal Path Resistance:
(EQ 7)
Junction Temperature (T
J
ºC) is determined by:
ºC (EQ 8)
Package
Lead Frame
PCB
Exposed Pad
Chip
TDFN Package
Bond Wire
Junction
T
J
°C
Package
T
C
°C
PCB/Heatsink
T
S
°C
Ambient
T
A
°C
Chip
Power
R
JC
R
CS
R
SA
R
JA
R
JC
R
CS
R
SA
++=
T
J
PD
MAX
R
JA
T
AMB
+=
www.austriamicrosystems.com/LDOs/AS1371 Revision 1.6 12 - 17
AS1371
Datasheet - Application Information
9.5 Explanation of Steady State Specifications
9.5.1 Line Regulation
Line regulation is defined as the change in output voltage when the input (or line) voltage is changed by a known quantity. It is a measure of the
regulator’s ability to maintain a constant output voltage when the input voltage changes. Line regulation is a measure of the DC open loop gain
of the error amplifier. More generally:
Line Regulation = and is a pure number (EQ 9)
In practise, line regulation is referred to the regulator output voltage in terms of % / VOUT. This is particularly useful when the same regulator is
available with numerous output voltage trim options.
Line Regulation = % / V (EQ 10)
9.5.2 Load Regulation
Load regulation is defined as the change of the output voltage when the load current is changed by a known quantity. It is a measure of the
regulator’s ability to maintain a constant output voltage when the load changes. Load regulation is a measure of the DC closed loop output
resistance of the regulator. More generally:
Load Regulation = and is units of ohms ()(EQ 11)
In practise, load regulation is referred to the regulator output voltage in terms of % / mA. This is particularly useful when the same regulator is
available with numerous output voltage trim options.
Load Regulation = % / mA (EQ 12)
9.5.3 Setting Accuracy
Accuracy of the final output voltage is determined by the accuracy of the ratio of R1 and R2, the reference accuracy and the input offset voltage
of the error amplifier. When the regulator is supplied pre-trimmed, the output voltage accuracy is fully defined in the output voltage specification.
When the regulator has a SET or SENSE terminal, the output voltage may be adjusted externally. In this case, the tolerance of the external
resistor network must be incorporated into the final accuracy calculation. Generally:
(EQ 13)
The reference tolerance is given both at 25ºC and over the full operating temperature range.
9.5.4 Total Accuracy
Away from dropout, total steady state accuracy is the sum of setting accuracy, load regulation and line regulation. Generally:
Total % Accuracy = Setting % Accuracy + Load Regulation % + Line Regulation % (EQ 14)
9.6 Explanation of Dynamic Specifications
9.6.1 Power Supply Rejection Ratio (PSRR)
Known also as Ripple Rejection, this specification measures the ability of the regulator to reject noise and ripple beyond DC. PSRR is a
summation of the individual rejections of the error amplifier, reference and AC leakage through the series pass transistor. The specification, in
the form of a typical attenuation plot with respect to frequency, shows up the gain bandwidth compromises forced upon the designer in low
quiescent current conditions. Generally:
PSSR = dB using lower case to indicate AC values (EQ 15)
Power supply rejection ratio is fixed by the internal design of the regulator. Additional rejection must be provided externally.
V
OUT
V
IN
----------------
V
OUT
V
IN
----------------
100
V
OUT
------------
V
OUT
I
OUT
----------------
V
OUT
I
OUT
----------------
100
V
OUT
----------------
V
OUT
V
SET
V
SET
=1
R1 R1
R2 R2
---------------------
+


20Log
V
OUT
V
IN
--------------- -

AS1371-BTDT-105

Mfr. #:
Manufacturer:
ams
Description:
LDO Voltage Controllers
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