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AFT26H200W03SR6

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
AFT26H200W03SR6
7
RF Device Data
Freescale Semiconductor, Inc.
V
DD
= 28 Vdc, I
DQA
= 494 mA, Pulsed CW, 10 μsec(on), 10% Duty Cycle
f
(MHz)
Z
source
(W)
Z
in
(W)
Max Output Power
P1dB
Z
load
(1)
(W)
Gain (dB) (dBm) (W)
h
D
(%)
AM/PM
(5)
2496 9.09 - j14.0 8.87 + j13.4 4.40 - j8.11 17.3 50.3 107 53.1 -12
2590 16.1 - j13.2 15.2 + j12.7 4.32 - j8.14 17.5 50.3 107 53.6 -13
2690 22.9 - j0.41 20.5 + j1.37 4.28 - j8.80 17.5 50.2 104 52.2 -13
f
(MHz)
Z
source
(W)
Z
in
(W)
Max Output Power
P3dB
Z
load
(2)
(W)
Gain (dB) (dBm) (W)
h
D
(%)
AM/PM
(5)
2496 9.09 - j14.0 9.41 + j14.6 4.15 - j8.72 15.1 51.0 127 53.7 -17
2590 16.1 - j13.2 17.5 + j13.6 4.16 - j8.90 15.2 51.0 127 53.7 -18
2690 22.9 - j0.41 22.2 - j1.34 4.21 - j9.41 15.2 50.9 123 52.3 -18
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Z
source
= Measured impedance presented to the input of the device at the package reference plane.
Z
in
= Impedance as measured from gate contact to ground.
Z
load
= Measured impedance presented to the output of the device at the package reference plane.
Figure 8. Carrier Side Load Pull Performance — Maximum Power Tuning
V
DD
= 28 Vdc, I
DQA
= 494 mA, Pulsed CW, 10 μsec(on), 10% Duty Cycle
f
(MHz)
Z
source
(W)
Z
in
(W)
Max Drain Efficiency
P1dB
Z
load
(1)
(W)
Gain (dB) (dBm) (W)
h
D
(%)
AM/PM
(5)
2496 9.09 - j14.0 8.65 + j14.2 9.14 - j5.50 19.4 48.7 74 63.1 -20
2590 16.1 - j13.2 15.2 + j14.1 7.18 - j4.60 19.5 48.8 74 63.2 -21
2690 22.9 - j0.41 22.1 + j2.44 6.06 - j4.93 19.5 48.7 74 61.6 -21
f
(MHz)
Z
source
(W)
Z
in
(W)
Max Drain Efficiency
P3dB
Z
load
(2)
(W)
Gain (dB) (dBm) (W)
h
D
(%)
AM/PM
(5)
2496 9.09 - j14.0 8.89 + j15.2 8.01 - j6.15 17.1 49.8 95 63.7 -26
2590 16.1 - j13.2 17.2 + j15.2 6.92 - j5.30 17.3 49.6 92 63.4 -27
2690 22.9 - j0.41 23.6 - j0.47 6.02 - j6.43 17.0 49.9 98 61.6 -25
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Z
source
= Measured impedance presented to the input of the device at the package reference plane.
Z
in
= Impedance as measured from gate contact to ground.
Z
load
= Measured impedance presented to the output of the device at the package reference plane.
Figure 9. Carrier Side Load Pull Performance — Maximum Drain Efficiency Tuning
Input Load Pull
Tuner and Test
Circuit
Device
Under
Test
Z
source
Z
in
Z
load
Output Load Pull
Tuner and Test
Circuit
8
RF Device Data
Freescale Semiconductor, Inc.
AFT26H200W03SR6
V
DD
= 28 Vdc, V
GSB
= 0.3 Vdc, Pulsed CW, 10 μsec(on), 10% Duty Cycle
f
(MHz)
Z
source
(W)
Z
in
(W)
Max Output Power
P1dB
Z
load
(1)
(W)
Gain (dB) (dBm) (W)
h
D
(%)
AM/PM
(5)
2496 5.24 - j10.6 5.15 + j9.87 2.61 - j5.59 11.6 52.6 181 52.5 -19
2590 10.3 - j9.81 9.38 + j9.30 2.63 - j5.84 12.0 52.5 176 51.9 -20
2690 12.7 - j0.94 12.0 + j1.20 2.68 - j6.10 12.3 52.1 164 49.8 -20
f
(MHz)
Z
source
(W)
Z
in
(W)
Max Output Power
P3dB
Z
load
(2)
(W)
Gain (dB) (dBm) (W)
h
D
(%)
AM/PM
(5)
2496 5.24 - j10.6 5.51 + j10.5 2.57 - j5.91 9.4 53.2 211 52.7 -25
2590 10.3 - j9.81 10.7 + j9.63 2.68 - j6.12 9.4 53.1 205 52.3 -25
2690 12.7 - j0.94 12.2 - j0.26 2.79 - j6.48 10.2 52.8 190 49.7 -25
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Z
source
= Measured impedance presented to the input of the device at the package reference plane.
Z
in
= Impedance as measured from gate contact to ground.
Z
load
= Measured impedance presented to the output of the device at the package reference plane.
Figure 10. Peaking Side Load Pull Performance — Maximum Power Tuning
V
DD
= 28 Vdc, V
GSB
= 0.3 Vdc, Pulsed CW, 10 μsec(on), 10% Duty Cycle
f
(MHz)
Z
source
(W)
Z
in
(W)
Max Drain Efficiency
P1dB
Z
load
(1)
(W)
Gain (dB) (dBm) (W)
h
D
(%)
AM/PM
(5)
2496 5.24 - j10.6 4.66 + j10.2 5.91 - j4.19 12.8 51.1 129 61.3 -27
2590 10.3 - j9.81 8.53 + j10.5 4.92 - j2.75 13.2 50.6 116 61.2 -30
2690 12.7 - j0.94 13.2 + j3.53 3.52 - j2.21 13.1 49.7 93 59.0 -35
f
(MHz)
Z
source
(W)
Z
in
(W)
Max Drain Efficiency
P3dB
Z
load
(2)
(W)
Gain (dB) (dBm) (W)
h
D
(%)
AM/PM
(5)
2496 5.24 - j10.6 5.08 + j10.8 5.29 - j4.65 10.7 52.0 160 61.9 -34
2590 10.3 - j9.81 10.2 + j10.5 4.64 - j4.15 11.1 52.0 158 61.2 -34
2690 12.7 - j0.94 13.3 + j1.00 3.85 - j3.19 11.2 51.0 127 58.2 -38
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Z
source
= Measured impedance presented to the input of the device at the package reference plane.
Z
in
= Impedance as measured from gate contact to ground.
Z
load
= Measured impedance presented to the output of the device at the package reference plane.
Figure 11. Peaking Side Load Pull Performance — Maximum Drain Efficiency Tuning
Input Load Pull
Tuner and Test
Circuit
Device
Under
Test
Z
source
Z
in
Z
load
Output Load Pull
Tuner and Test
Circuit
AFT26H200W03SR6
9
RF Device Data
Freescale Semiconductor, Inc.
P1dB − TYPICAL CARRIER SIDE LOAD PULL CONTOURS — 2590 MHz
-14
-2
-6
6
810214
-4
-8
-10
12
-12
4
-14
-2
-6
6
810214
-4
-8
-10
12
-12
4
-14
-2
-6
6
810214
-4
-8
-10
12
-12
4
NOTE: = Maximum Output Power
= Maximum Drain Efficiency
P
E
Power Gain
Drain Efficiency
Linearity
Output Power
Figure 12. P1dB Load Pull Output Power Contours (dBm)
REAL (Ω)
-14
-2
-6
IMAGINARY (Ω)
6
810214
-4
-8
-10
12
-12
4
Figure 13. P1dB Load Pull Efficiency Contours (%)
REAL (Ω)
IMAGINARY (Ω)
IMAGINARY (Ω)
Figure 14. P1dB Load Pull Gain Contours (dB)
REAL (Ω)
Figure 15. P1dB Load Pull AM/PM Contours (5)
REAL (Ω)
IMAGINARY (Ω)
47.5
47
P
E
P
E
P
E
P
E
47
48
48.5
49
49.5
50
48
47.5
47
60
58
56
54
52
50
48
46
62
19.5
20
19
18.5
18
17.5
17
16.5
16
-26
-24
-22
-20
-18
-16
-14
-12
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16

AFT26H200W03SR6

Mfr. #:
Buy AFT26H200W03SR6
Manufacturer:
NXP / Freescale
Description:
RF MOSFET Transistors Airfast RF Pwr LDMOS Trx, 2.49-.69GHz
Lifecycle:
New from this manufacturer.
Delivery:
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