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PHD20N06T,118
P1-P3
P4-P6
P7-P9
P10-P12
P13-P13
PHD20N06T_2
© NXP B.V
. 2009. All rights rese
rved.
Product data sheet
Rev
. 02 — 1 December 2009
3 of 12
NXP Semiconductors
PHD20N06T
N-channel T
renchMOS st
andard level FET
Fig 1.
Normalized continuous drain curre
nt as a
function of mou
nting base tempera
ture
Fig 2.
Normalize
d total power diss
ipation as a
function of mounting base temp
erature
Fig 3.
Safe operating area; continuous an
d peak drain curren
ts as a function of drain-source voltage
T
mb
(
°
C)
0
200
150
50
100
03aa24
40
80
120
I
der
(%)
0
T
mb
(
°
C)
0
200
150
50
100
03aa16
40
80
120
P
der
(%)
0
003aaa043
10
−
1
1
10
10
2
10
3
1
10
10
2
VDS
(V)
I
D
D.C.
10 ms
R
DSon
= V
DS
/ I
D
1 ms
t
p
= 10
μ
s
100
μ
s
t
p
t
p
T
P
t
T
δ
=
(A)
PHD20N06T_2
© NXP B.V
. 2009. All rights rese
rved.
Product data sheet
Rev
. 02 — 1 December 2009
4 of 12
NXP Semiconductors
PHD20N06T
N-channel T
renchMOS st
andard level FET
5.
Thermal characteristics
T
able 5.
Thermal characteristics
Symbol
Parameter
Conditions
Min
Ty
p
Max
Unit
R
th(j-mb)
thermal resistance from
junction t
o mounting
base
see
Figure 4
--2
.
9
K
/
W
R
th(j-a)
thermal resistance from
junction
to ambie
nt
minimum footprint; FR4 boa
rd
-
71.4
-
K/W
Fig 4.
Trans
ient thermal impeda
nce from junction t
o mounting base a
s a function of
pulse duration
003aaa053
Single pulse
0.2
0.1
0.05
0.02
10
−
2
10
−
1
1
10
10
−
6
10
−
5
10
−
4
10
−
3
10
−
2
10
−
1
1
t
p
(s)
Z
th(j-mb)
(K/W)
δ
= 0.5
t
p
t
p
T
P
t
T
δ
=
PHD20N06T_2
© NXP B.V
. 2009. All rights rese
rved.
Product data sheet
Rev
. 02 — 1 December 2009
5 of 12
NXP Semiconductors
PHD20N06T
N-channel T
renchMOS st
andard level FET
6.
Characteristics
T
able 6.
Characteristics
Symbol
Parameter
Conditions
Min
Ty
p
Max
Unit
St
atic characteris
tics
V
(BR)DSS
drain-source
breakdown voltage
I
D
=0
.
2
5m
A
;
V
GS
=0V
;
T
j
=-
5
5°
C
5
0
-
-
V
I
D
=0
.
2
5m
A
;
V
GS
=0V
;
T
j
=2
5°
C
5
5
-
-
V
V
GS(th)
gate-source threshold
voltage
I
D
=1m
A
;
V
DS
= V
GS
; T
j
=-
5
5°
C
;
see
Figure 10
--4
.
4
V
I
D
=1m
A
;
V
DS
= V
GS
; T
j
=1
7
5°
C
;
see
Figure 10
1-
-
V
I
D
=1m
A
;
V
DS
= V
GS
; T
j
=2
5°
C
;
see
Figure 10
234V
I
DSS
drain leakage current
V
DS
=5
5V
;
V
GS
=0V
;
T
j
= 25 °C
-
0.05
10
µA
V
DS
=5
5V
;
V
GS
=0V
;
T
j
= 175 °C
-
-
500
µA
I
GSS
gate leakage current
V
GS
=2
0V
;
V
DS
=0V
;
T
j
= 25 °
C
-
2
100
nA
V
GS
=-
2
0V
;
V
DS
=0V
;
T
j
= 25 °
C
-
2
100
nA
R
DSon
drain-source on-state
resistance
V
GS
=1
0V
;
I
D
=1
0A
;
T
j
= 175 °C;
see
Figure 1
1
an
d
12
--1
5
4
m
Ω
V
GS
=1
0V
;
I
D
=1
0A
;
T
j
=2
5°
C
;
see
Figure 1
1
and
12
-6
5
7
7
m
Ω
Dynamic ch
aracteri
stics
Q
G(tot)
total gate charge
I
D
=2
5A
;
V
DS
=4
4V
;
V
GS
=1
0V
;
T
j
=2
5°
C
;
s
e
e
Figure 13
-1
1
-n
C
Q
GS
gate-source charge
-
3
-
nC
Q
GD
gate-drain charge
-
6
-
nC
C
iss
input capacitance
V
DS
=2
5V
;
V
GS
= 0 V
; f = 1 MHz;
T
j
=2
5°
C
;
s
e
e
Figure 14
-
316
422
pF
C
oss
output capacitance
-
92
1
10
p
F
C
rss
reverse transfer
capacit
ance
-6
4
8
7
p
F
t
d(on)
turn-on delay time
V
DS
=3
0V
;
R
L
=1
.
2
Ω
; V
GS
=1
0V
;
R
G(ext)
=1
0
Ω
; T
j
=2
5°
C
-1
0
-n
s
t
r
rise time
-
50
-
ns
t
d(off
)
turn-off delay time
-
70
-
ns
t
f
fall time
-
40
-
ns
L
D
internal drain
induct
ance
measured from drain lea
d from package to
centre of die; T
j
=2
5°
C
-2
.
5
-n
H
L
S
internal source
induct
ance
measured from source lead
from package
to source bond pad; T
j
=2
5°
C
-7
.
5
-n
H
Source-drain di
ode
V
SD
source-drain voltage
I
S
=1
0A
;
V
GS
=0V
;
T
j
=2
5°
C
;
see
Figure 15
-
0.85
1.2
V
t
rr
reverse recovery time
I
S
=2
0A
;
d
I
S
/dt = -100 A/
µs; V
GS
=-
1
0V
;
V
DS
=3
0V
;
T
j
=2
5°
C
-3
2
-n
s
Q
r
recovered charge
-
120
-
nC
P1-P3
P4-P6
P7-P9
P10-P12
P13-P13
PHD20N06T,118
Mfr. #:
Buy PHD20N06T,118
Manufacturer:
Nexperia
Description:
MOSFET TAPE13 MOSFET
Lifecycle:
New from this manufacturer.
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PHD20N06T,118