FUNCTIONAL BLOCK DIAGRAMS
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
LC
2
MOS
Dual 12-Bit DACPORTs
AD7237A/AD7247A
FEATURES
Complete Dual 12-Bit DAC Comprising
Two 12-Bit CMOS DACs
On-Chip Voltage Reference
Output Amplifiers
Reference Buffer Amplifiers
Improved AD7237/AD7247:
12 V to 15 V Operation
Faster Interface –30 ns typ Data Setup Time
Parallel Loading Structure: AD7247A
(8+4) Loading Structure: AD7237A
Single or Dual Supply Operation
Low Power—165 mW typ in Single Supply
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700 Fax: 617/326-8703
PRODUCT HIGHLIGHTS
1. The AD7237A/AD7247A is a dual 12-bit DACPORT
®
on a
single chip. This single chip design and small package size
offer considerable space saving and increased reliability over
multichip designs.
2. The improved interface times of the parts allow easy, direct
interfacing to most modern microprocessors, whether they
have 8-bit or 16-bit data bus structures.
3. The AD7237A/AD7247A features a wide power supply
range allowing operation from 12 V supplies.
DACPORT is a registered trademark of Analog Devices, Inc.
GENERAL DESCRIPTION
The AD7237A/AD7247A is an enhanced version of the industry
standard AD7237/AD7247. Improvements include operation
from 12 V to 15 V supplies, faster interface times and better
reference variations with V
DD
. Additional features include faster
settling times.
The AD7237A/AD7247A is a complete, dual, 12-bit, voltage
output digital-to-analog converter with output amplifiers and
Zener voltage reference on a monolithic CMOS chip. No exter-
nal user trims are required to achieve full specified performance.
Both parts are microprocessor compatible, with high speed data
latches and interface logic. The AD7247A accepts 12-bit paral-
lel data which is loaded into the respective DAC latch using the
WR input and a separate Chip Select input for each DAC. The
AD7237A has a double buffered interface structure and an 8-bit
wide data bus with data loaded to the respective input latch in
two write operations. An asynchronous
LDAC signal on the
AD7237A updates the DAC latches and analog outputs.
A REF OUT/REF IN function is provided which allows either
the on-chip 5 V reference or an external reference to be used as
a reference voltage for the part. For single supply operation, two
output ranges of 0 V to +5 V and 0 V to +10 V are available,
while these two ranges plus an additional ±5 V range are avail-
able with dual supplies. The output amplifiers are capable of de-
veloping +10 V across a 2 k load to GND.
The AD7237A/AD7247A is fabricated in Linear Compatible
CMOS (LC
2
MOS), an advanced, mixed technology process
that combines precision bipolar circuits with low power CMOS
logic. Both parts are available in a 24-pin, 0.3" wide plastic and
hermetic dual-in-line package (DIP) and are also packaged in a
24-lead small outline (SOIC) package.
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–2–
AD7237A/AD7247A–SPECIFICATIONS
(V
DD
= +12 V to +15 V,
1
V
SS
= 0 V or –12 V to –15 V,
1
AGND =
DGND = 0 V [AD7237A], GND = 0 V [AD7247A], REF IN = +5 V,
Parameter A
2
B
2
T
2
Units Test Conditions/Comments
STATIC PERFORMANCE
Resolution 12 12 12 Bits
Relative Accuracy
3
±1 ±1/2 ±1/2 LSB max
Differential Nonlinearity
3
±0.9 ±0.9 ±0.9 LSB max Guaranteed Monotonic
Unipolar Offset Error
3
±3 ±3 ±4 LSB max V
SS
= 0 V or –12 V to –15 V
4
. DAC Latch Contents All 0s
Bipolar Zero Error
3
±6 ±4 ±6 LSB max V
SS
= –12 V to –15 V
4
. DAC Latch Contents
1000 0000 0000
Full-Scale Error
3, 5
±5 ±5 ±6 LSB max
Full-Scale Mismatch
5
±1 ±1 ±1 LSB typ
REFERENCE OUTPUT
REF OUT 4.97/5.03 4.97/5.03 4.95/5.05 V min/max
Reference Temperature
Coefficient ±25 ±25 ±25 ppm/°C typ
Reference Load Change
(REF OUT vs. I) –1 –1 –1 mV max Reference Load Current Change (0-100 µA)
REFERENCE INPUT
Reference Input Range 4.75/5.25 4.75/5.25 4.75/5.25 V min/max 5 V ± 5%
Input Current
6
±5 ±5 ±5 µA max
DIGITAL INPUTS
Input High Voltage, V
INH
2.4 2.4 2.4 V min
Input Low Voltage, V
INL
0.8 0.8 0.8 V max
Input Current
I
IN
(Data Inputs) ±10 ±10 ±10 µA max V
IN
= 0 V to V
DD
Input Capacitance
6
8 8 8 pF max
ANALOG OUTPUTS
Output Range Resistors 15/30 15/30 15/30 k min/max
Output Voltage Ranges
7
+5, +10 +5, +10 V Single Supply; (V
SS
= 0 V)
Output Voltage Ranges
7
+5, +10, ±5 +5, +10, ±5 +5, +10, ±5 Dual Supply; (V
SS
= –12 V to –15 V
4
)
DC Output Impedance 0.5 0.5 0.5 typ
AC CHARACTERISTICS
6
Voltage Output Settling Time Settling Time to Within ±1/2 LSB of Final Value
Positive Full-Scale Change 8 8 10 µs max DAC Latch all 0s to all 1s. Typically 5 µs
Negative Full-Scale Change 8 8 10 µs max DAC Latch all 1s to all 0s. Typically 5 µs
V
SS
= –12 V to –15 V
4
.
Digital-to-Analog Glitch
Impulse
3
30 30 30 nV secs typ DAC Latch Contents Toggled Between all 0s and all 1s
Digital Feedthrough
3
10 10 10 nV secs typ
Digital Crosstalk
3
30 30 30 nV secs typ
POWER REQUIREMENTS
V
DD
+10.8/+16.5 +11.4/+15.75 +11.4/+15.75 V min/max For Specified Performance Unless Otherwise Stated
V
SS
–10.8/–16.5 –11.4/–15.75 –11.4/–15.75 V min/max For Specified Performance Unless Otherwise Stated
I
DD
15 15 15 mA max Output Unloaded. Typically 10 mA
I
SS
(Dual Supplies) 5 5 5 mA max Output Unloaded. Typically 3 mA
NOTES
1
Power Supply tolerance is ±10% for A version and ±5% for B and T versions.
2
Temperature ranges are as follows: A, B Versions, –40°C to +85°C; T Version, –55°C to +125°C.
3
See Terminology.
4
With appropriate power supply tolerances.
5
Measured with respect to REF IN and includes unipolar/bipolar offset error.
6
Sample tested @ +25°C to ensure compliance.
7
0 V to +10 V range is only available with V
DD
14.25 V.
Specifications subject to change without notice.
R
L
= 2 k, C
L
= 100 pF. All specifications T
MIN
to T
MAX
unless otherwise noted.)
AD7237A/AD7247A
REV. 0
–3–
TIMING CHARACTERISTICS
1, 2
Limit at T
MIN
, T
MAX
Limit at T
MIN
, T
MAX
Parameter (A, B Versions) (T Version) Units Conditions/Comments
t
1
0 0 ns min CS to WR Setup Time
t
2
0 0 ns min CS to WR Hold Time
t
3
80 100 ns min WR Pulse Width
t
4
80 80 ns min Data Valid to WR Setup Time
t
5
4
10 10 ns min Data Valid to WR Hold Time
t
6
0 0 ns min Address to WR Setup Time
t
7
0 0 ns min Address to WR Hold Time
t
8
5
80 100 ns min LDAC Pulse Width
NOTES
1
Sample tested at +25°C to ensure compliance. All input signals are specified with tr = tf = 5 ns (10% to 90% of 5 V) and timed from a voltage level of 1.6 V.
2
See Figures 5 and 7.
3
Power Supply tolerance is ±10% for A version and ±5% for B and T versions.
4
If 0 ns < t
2
< 10 ns, add t
2
to t
5
. If t
2
10 ns, add 10 ns to t
5
.
5
AD7237A only.
ABSOLUTE MAXIMUM RATINGS
1
(T
A
= +25°C unless otherwise noted)
V
DD
to GND (AD7247A) . . . . . . . . . . . . . . . .–0.3 V to +17 V
V
DD
to AGND, DGND (AD7237A) . . . . . . . .–0.3 V to +17 V
V
DD
to V
SS
. . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.3 V to +34 V
AGND to DGND (AD7237A) . . . . . . . . . –0.3 V, V
DD
+0.3 V
V
OUTA
,
2
V
OUTB
2
to AGND (GND) . . V
SS
–0.3 V to V
DD
+0.3 V
REF OUT to AGND (GND) . . . . . . . . . . . . . . . . . 0 V to V
DD
REF IN to AGND (GND) . . . . . . . . . . –0.3 V to V
DD
+0.3 V
Digital Inputs to DGND (GND) . . . . . . –0.3 V to V
DD
+0.3 V
Operating Temperature Range
Industrial (A, B Versions) . . . . . . . . . . . . . –40°C to +85°C
Extended (T Version) . . . . . . . . . . . . . . . –55°C to +125°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 10 secs) . . . . . . . . . . . . +300°C
Power Dissipation (Any Package) to +75°C . . . . . . . 1000 mW
Derates above +75°C by . . . . . . . . . . . . . . . . . . . . . 10 mW/°C
NOTES
1
Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those listed in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
2
Short-circuit current is typically 80 mA. The outputs may be shorted to voltages
in this range provided the power dissipation of the package is not exceeded.
ORDERING GUIDE
Relative
Temperature Accuracy Package
Model
1
Range (LSB) Option
2
AD7237AAN –40°C to +85°C ±1 max N-24
AD7237ABN –40°C to +85°C ±1/2 max N-24
AD7237AAR –40°C to +85°C ±1 max R-24
AD7237ABR –40°C to +85°C ±1/2 max R-24
AD7237ATQ –55°C to +125°C ±1/2 max Q-24
AD7247AAN –40°C to +85°C ±1 max N-24
AD7247ABN –40°C to +85°C ±1/2 max N-24
AD7247AAR –40°C to +85°C ±1 max R-24
AD7247ABR –40°C to +85°C ±1/2 max R-24
AD7247ATQ –55°C to +125°C ±1/2 max Q-24
NOTES
1
To order MIL-STD-883, Class B processed parts, add /883B to part number.
Contact local sales office for military data sheet and availability.
2
N = Plastic DIP; Q = Cerdip; R = Small Outline (SOIC).
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7237A/AD7247A features proprietary ESD protection circuitry, permanent
damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper
ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
(V
DD
= +12 V to +15 V,
3
V
SS
= 0 V or –12 V to –15 V,
3
AGND = DGND = 0 V [AD7237A],
GND = 0 V [AD7247A])

AD7247ABN

Mfr. #:
Manufacturer:
Description:
Digital to Analog Converters - DAC DUAL 12 BIT IC w/ Parallel Load
Lifecycle:
New from this manufacturer.
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