AD7237A/AD7247A
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AD7237A PIN FUNCTION DESCRIPTION (DIP PIN NUMBERS)
Pin Mnemonic Description
1 REF INA Voltage Reference Input for DAC A. The reference voltage for DAC A is applied to this pin. It is internally
buffered before being applied to the DAC. The nominal reference voltage for correct operation of the
AD7237A is 5 V.
2 REF OUT Voltage Reference Output. The internal 5 V analog reference is provided at this pin. To operate the part with
internal reference, REF OUT should be connected to REF INA, REF INB.
3 REF INB Voltage Reference Input for DAC B. The reference voltage for DAC B is applied to this pin. It is internally
buffered before being applied to the DAC. The nominal reference voltage for correct operation of the
AD7237A is 5 V.
4R
OFSB
Output Offset Resistor for DAC B. This input configures the output ranges for DAC B. It is connected to
V
OUTB
for the +5 V range, to AGND for the +10 V range and to REF INB for the ±5 V range.
5V
OUTB
Analog Output Voltage from DAC B. This is the buffer amplifier output voltage. Three different output
voltage ranges can be chosen: 0 V to +5 V, 0 V to +10 V and ±5 V. The amplifier is capable of developing
+10 V across a 2 k resistor to GND.
6 AGND Analog Ground. Ground reference for DACs, reference and output buffer amplifiers.
7 DB7 Data Bit 7.
8-10 DB6-DB4 Data Bit 6 to Data Bit 4.
11 DB3 Data Bit 3/Data Bit 11 (MSB).
12 DGND Digital Ground. Ground reference for digital circuitry.
13 DB2 Data Bit 2/Data Bit 10.
14 DB1 Data Bit 1/Data Bit 9.
15 DB0 Data Bit 0 (LSB)/Data Bit 8.
16 A0 Address Input. Least significant address input for input latches. A0 and A1 select which of the four input
latches data is written to (see Table II).
17 A1 Address Input. Most significant address input for input latches.
18
CS Chip Select. Active low logic input. The device is selected when this input is active.
19
WR Write Input. WR is an active low logic input which is used in conjunction with CS, A0 and A1 to write data
to the input latches.
20
LDAC Load DAC. Logic input. A new word is loaded into the DAC latches from the respective input latches on the
falling edge of this signal.
21 V
DD
Positive Supply (+12 V to +15 V).
22 V
OUTA
Analog Output Voltage from DAC A. This is the buffer amplifier output voltage. Three different output
voltage ranges can be chosen: 0 V to +5 V, 0 V to +10 V and ±5 V. The amplifier is capable of developing
+10 V across a 2 k resistor to GND.
23 V
SS
Negative Supply (0 V or –12 V to –15 V).
24 R
OFSA
Output Offset Resistor for DAC A. This input configures the output ranges for DAC A. It is connected to
V
OUTA
for the +5 V range, to AGND for the +10 V range and to REF INA for the ±5 V range.
AD7237A/AD7247A
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AD7247A PIN FUNCTION DESCRIPTION (DIP PIN NUMBERS)
Pin Mnemonic Description
1 REF OUT Voltage Reference Output. The internal 5 V analog reference is provided at this pin. To operate the part
with internal reference, REF OUT should be connected to REF IN.
2R
OFSB
Output Offset Resistor for DAC B. This input configures the output ranges for DAC B. It is connected to
V
OUTB
for the +5 V range, to GND for the +10 V range and to REF IN for the ±5 V range.
3V
OUTB
Analog Output Voltage from DAC B. This is the buffer amplifier output voltage. Three different output
voltage ranges can be chosen: 0 V to +5 V, 0 V to +10 V and ±5 V. The amplifier is capable of developing
+10 V across a 2 k resistor to GND.
4 DB11 Data Bit 11 (MSB).
5 DB10 Data Bit 10.
6 GND Ground. Ground reference for all on-chip circuitry.
7–15 DB9-DB1 Data Bit 9 to Data Bit 1.
16 DB0 Data Bit 0 (LSB).
17
CSB Chip Select Input for DAC B. Active low logic input. DAC B is selected when this input is active.
18
CSA Chip Select Input for DAC A. Active low logic input. DAC A is selected when this input is active.
19
WR Write Input. WR is an active low logic input which is used in conjunction with CSA and CSB to write data
to the DAC latches.
20 V
DD
Positive Supply (+12 V to +15 V).
21 V
OUTA
Analog Output Voltage from DAC A. This is the buffer amplifier output voltage. Three different output
voltage ranges can be chosen: 0 V to +5 V, 0 V to +10 V and ±5 V. The amplifier is capable of developing
+10 V across a 2 k resistor to GND.
22 V
SS
Negative Supply (0 V or –12 V to –15 V).
23 R
OFSA
Output Offset Resistor for DAC A. This input configures the output ranges for DAC A. It is connected to
V
OUTA
for the +5 V range, to GND for the +10 V range and to REF IN for the ±5 V range.
24 REF IN Voltage Reference Input. The common reference voltage for both DACs is applied to this pin. It is internally
buffered before being applied to both DACs. The nominal reference voltage for correct operation of the
AD7247A is 5 V.
AD7237A PIN CONFIGURATION
DIP and SOIC
AD7247A PIN CONFIGURATION
DIP and SOIC
AD7237A/AD7247A
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TERMINOLOGY
RELATIVE ACCURACY (LINEARITY)
Relative Accuracy, or endpoint linearity, is a measure of the
maximum deviation of the DAC transfer function from a
straight line passing through the endpoints of the transfer func-
tion. It is measured after allowing for zero and full-scale errors
and is expressed in LSBs or as a percentage of full-scale reading.
DIFFERENTIAL NONLINEARITY
Differential Nonlinearity is the difference between the measured
change and the ideal 1 LSB change between any two adjacent
codes. A specified differential nonlinearity of ±1 LSB or less
over the operating temperature range ensures monotonicity.
SINGLE SUPPLY LINEARITY AND GAIN ERROR
The output amplifiers of the AD7237A/AD7247A can have true
negative offsets even when the part is operated from a single
+12 V to +15 V supply. However, because the negative supply
rail (V
SS
) is 0 V, the output cannot actually go negative. Instead,
when the output offset voltage is negative, the output voltage
sits at 0 V, resulting in the transfer function shown in Figure 1.
This “knee” is an offset effect, not a linearity error, and the
transfer function would have followed the dotted line if the out-
put voltage could have gone negative.
Figure 1. Effect of Negative Offset (Single Supply)
Normally, linearity is measured between zero (all 0s input code)
and full scale (all 1s input code) after offset and full scale have
been adjusted out or allowed for, but this is not possible in
single supply operation if the offset is negative, due to the knee
in the transfer function. Instead, linearity of the AD7237A/
AD7247A in the unipolar mode is measured between full scale
and the lowest code which is guaranteed to produce a positive
output voltage. This code is calculated from the maximum
specification for negative offset, i.e., linearity is measured be-
tween Codes 3 and 4095.
UNIPOLAR OFFSET ERROR
Unipolar Offset Error is the measured output voltage from
V
OUTA
or V
OUTB
with all zeros loaded into the DAC latches
when the DACs are configured for unipolar output. It is a com-
bination of the offset errors of the DAC and output amplifier.
BIPOLAR ZERO ERROR
Bipolar Zero Error is the voltage measured at V
OUTA
or V
OUTB
when the DAC is connected in the bipolar mode and loaded
with code 2048. It is due to a combination of offset errors in the
DAC, amplifier offset and mismatch in the application resistors
around the amplifier.
FULL-SCALE ERROR
Full-Scale Error is a measure of the output error when the
amplifier output is at full scale (for the bipolar output range full
scale is either positive or negative full scale). It is measured with
respect to the reference input voltage and includes the offset
errors.
DIGITAL FEEDTHROUGH
Digital Feedthrough is the glitch impulse injected for the digital
inputs to the analog output when the data inputs change state,
but the data in the DAC latches is not changed.
For the AD7237A it is measured with
LDAC held high. For the
AD7247A it is measured with
CSA and CSB held high.
DIGITAL CROSSTALK
Digital crosstalk is the glitch impulse transferred to the output
of one converter due to a change in digital code to the DAC
latch of the other converter. It is specified in nV secs.
DIGITAL-TO-ANALOG GLITCH IMPULSE
This is the voltage spike that appears at the output of the DAC
when the digital code changes before the output settles to its fi-
nal value. The energy in the glitch is specified in nV secs and is
measured for a 1 LSB change around the major carry transition
(0111 1111 1111 to 1000 0000 0000).

AD7247ABN

Mfr. #:
Manufacturer:
Description:
Digital to Analog Converters - DAC DUAL 12 BIT IC w/ Parallel Load
Lifecycle:
New from this manufacturer.
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