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LT3782EFE#TRPBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20
LT3782
10
3782fg
then R
FREQ1
+ R
FREQ2
should be 80k and V
DELAY
should
be 1V, with V
RSET
= 2.3V then R
FREQ1
= 47.5k and R
FREQ2
= 32.5k (see Figure 3).
Duty Cycle Limit
When DCL pin is shorted to R
SET
pin and switching fre-
quency is less than 250kHz (R
FREQ
> 80k), the maximum
duty cycle of LT3782 will be at least 90%. The maximum
duty cycle can be clamped to 50% by grounding the DCL
pin or to 75% by forcing the V
DCL
voltage to 1.2V with a
resistor divider from R
SET
pin to ground. The typical DCL
pin input current is 0.2μA.
Slope Compensation
The LT3782 is designed for high voltage and/or high
current applications, and very often these applications
generate noise spikes that can be picked up by the cur-
rent sensing amplifi er and cause switching jitter. To avoid
switching jitter, careful layout is absolutely necessary to
minimize the current sensing noise pickup. Sometimes
increasing slope compensation to overcome the noise
can help to reduce jitter. The built-in slope compensa-
tion can be increased by adding a resistor R
SLOPE
from
SLOPE pin to ground. Note that smaller R
SLOPE
increases
slope compensation and the minimum R
SLOPE
allowed is
R
FREQ
/2.
Layout Considerations
To prevent EMI, the power MOSFETs and input bypass
capacitor leads should be kept as short as possible. A
ground plane should be used under the switching circuitry
to prevent interplane coupling and to act as a thermal
spreading path. Note that the bottom pad of the package
is the heat sink, as well as the IC signal ground, and must
be soldered to the ground plane.
In a boost converter, the conversion gain (assuming 100%
effi ciency) is calculated as (ignoring the forward voltage
drop of the boost diode):
V
OUT
V
IN
=
1
1−D
where D is the duty ratio of the main switch. D can then
be estimated from the input and output voltages:
D=1−
V
IN
V
OUT
;D
MAX
=1−
V
IN(MIN)
V
OUT
Figure 3. Increase Delay Time
R
SET
DELAY
LT3782
R
FREQ2
32.5k
R
FREQ1
47.5k
3782 F03
APPLICATIONS INFORMATION
LT3782
11
3782fg
The Peak and Average Input Currents
The control circuit in the LT3782 measures the input current
by using a sense resistor in each MOSFET source, so the
output current needs to be refl ected back to the input in
order to dimension the power MOSFET properly. Based
on the fact that, ideally, the output power is equal to the
input power, the maximum average input current is:
I
IN(MAX)
=
I
O(MAX)
1–D
MAX
The peak current is:
I
IN(PEAK)
=1.2 •
I
O(MAX)
1–D
MAX
The maximum duty cycle, D
MAX
, should be calculated at
minimum V
IN
.
Power Inductor Selection
In a boost circuit, a power inductor should be designed
to carry the maximum input DC current. The inductance
should be small enough to generate enough ripple current
to provide adequate signal to noise ratio to the LT3782.
An empirical starting of the inductor ripple current (per
phase) is about 40% of maximum DC current, which is
half of the input DC current in a 2-phase circuit:
ΔI
L
≅ 40% •
I
OUT(MAX)
•V
OUT
2V
IN
= 20% •
I
OUT(MAX)
•V
OUT
V
IN
where V
IN
, V
OUT
and I
OUT
are the DC input voltage, output
voltage and output current, respectively.
And the inductance is estimated to be:
L =
V
IN
•D
f
s
• ΔI
L
where f
s
is the switching frequency per phase.
The saturation current level of inductor is estimated to
be:
I
SAT
≥
ΔI
L
2
+
I
IN
2
≅ 70% •
I
OUT(MAX)
•V
OUT
V
IN(MIN)
Sense Resistor Selection
During the switch on-time, the control circuit limits the
maximum voltage drop across the sense resistor to about
60mV. The peak inductor current is therefore limited to
60mV/R. The relationship between the maximum load
current, duty cycle and the sense resistor R
SENSE
is:
R≤ V
SENSE(MAX)
•
1–D
MAX
1.2 •
I
O(MAX)
2
Power MOSFET Selection
Important parameters for the power MOSFET include the
drain-to-source breakdown voltage (BV
DSS
), the threshold
voltage (V
GS(TH)
), the on-resistance (R
DS(ON)
) versus gate-
to-source voltage, the gate-to-source and gate-to-drain
charges (Q
GS
and Q
GD
, respectively), the maximum drain
current (I
D(MAX)
) and the MOSFET’s thermal resistances
(R
TH(JC)
and R
TH(JA)
).
APPLICATIONS INFORMATION
LT3782
12
3782fg
The gate drive voltage is set by the 10V GBIAS regulator.
Consequently, 10V rated MOSFETs are required in most
high voltage LT3782 applications.
Pay close attention to the BV
DSS
specifi cations for the
MOSFETs relative to the maximum actual switch voltage
in the application. The switch node can ring during the
turn-off of the MOSFET due to layout parasitics. Check the
switching waveforms of the MOSFET directly across the
drain and source terminals using the actual PC board layout
(not just on a lab breadboard!) for excessive ringing.
Calculating Power MOSFET Switching and Conduction
Losses and Junction Temperatures
In order to calculate the junction temperature of the power
MOSFET, the power dissipated by the device must be known.
This power dissipation is a function of the duty cycle, the
load current and the junction temperature itself (due to
the positive temperature coeffi cient of its R
DS(ON)
). As a
result, some iterative calculation is normally required to
determine a reasonably accurate value. Care should be
taken to ensure that the converter is capable of delivering
the required load current over all operating conditions (line
voltage and temperature), and for the worst-case speci-
fi cations for V
SENSE(MAX)
and the R
DS(ON)
of the MOSFET
listed in the manufacturer’s data sheet.
The power dissipated by the MOSFET in a 2-phase boost
converter is:
P
FET
=
I
O(MAX)
2
1–D
( )
2
•R
DS(ON)
•D•
T
+k•V
O
2
•
I
O(MAX)
2
1–D
( )
•C
RSS
•f
The fi rst term in the equation above represents the I
2
R
losses in the device, and the second term, the switching
losses. The constant, k = 1.7, is an empirical factor inversely
related to the gate drive current and has the dimension
of 1/current. The ρ
T
term accounts for the temperature
coeffi cient of the R
DS(ON)
of the MOSFET, which is typically
0.4%/°C. Figure 4 illustrates the variation of normalized
R
DS(ON)
over temperature for a typical power MOSFET.
JUNCTION TEMPERATURE (°C)
–50
ρ
T
NORMALIZED ON RESISTANCE
1.0
1.5
150
3782 F06
0.5
0
0
50
100
2.0
Figure 4. Normalized R
DS(ON)
vs Temperature
APPLICATIONS INFORMATION
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20

LT3782EFE#TRPBF

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Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 2-Phase Step-Up Controller
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