IDT
/ ICS
PCI EXPRESS™ JITTER ATTENUATOR 10 ICS874003AGI-02 REV A MAY 1, 2013
ICS874003I-02
PCI EXPRESS™ JITTER ATTENUATOR
POWER CONSIDERATIONS
This section provides information on power dissipation and junction temperature for the ICS874003I-02.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS874003I-02 is the sum of the core power plus the power dissipated due to the load.
The following is the power dissipation for V
DD
= 3.3V + 5% = 3.465V, which gives worst case results.
Power (core)
MAX
= V
DD_MAX
* (I
DD_MAX
+ I
DDA_MAX
) = 3.465V * (75mA + 12mA) = 301.45mW
Power (outputs)
MAX
= V
DDO_MAX
* I
DDO_MAX
= 3.465V * 75mA = 259.87mW
Total Power
_MAX
= 301.45mW + 259.87mW = 561.32mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature is 125°C.
The equation for Tj is as follows: Tj = θ
JA
* Pd_total + T
A
Tj = Junction Temperature
θ
JA
= Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
A
= Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ
JA
must be used. Assuming a
moderate air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 66.6°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.561W * 66.6°C/W = 122.4°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow, and
the type of board (single layer or multi-layer).
TABLE 6. THERMAL RESISTANCE
θθ
θθ
θ
JA
FOR 20-LEAD TSSOP, FORCED CONVECTION
θθ
θθ
θ
JA
by Velocity (Linear Feet per Minute)
0 200 500
Single-Layer PCB, JEDEC Standard Test Boards 114.5°C/W 98.0°C/W 88.0°C/W
Multi-Layer PCB, JEDEC Standard Test Boards 73.2°C/W 66.6°C/W 63.5°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
IDT
/ ICS
PCI EXPRESS™ JITTER ATTENUATOR 11 ICS874003AGI-02 REV A MAY 1, 2013
ICS874003I-02
PCI EXPRESS™ JITTER ATTENUATOR
RELIABILITY INFORMATION
TRANSISTOR COUNT
The transistor count for ICS874003I-02 is: 1408
TABLE 6. θ
JA
VS. AIR FLOW TABLE FOR 20 LEAD TSSOP
θθ
θθ
θ
JA
by Velocity (Linear Feet per Minute)
0 200 500
Single-Layer PCB, JEDEC Standard Test Boards 114.5°C/W 98.0°C/W 88.0°C/W
Multi-Layer PCB, JEDEC Standard Test Boards 73.2°C/W 66.6°C/W 63.5°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
IDT
/ ICS
PCI EXPRESS™ JITTER ATTENUATOR 12 ICS874003AGI-02 REV A MAY 1, 2013
ICS874003I-02
PCI EXPRESS™ JITTER ATTENUATOR
PACKAGE OUTLINE - G SUFFIX FOR 20 LEAD TSSOP
T
ABLE 7. PACKAGE DIMENSIONS
LOBMYS
sretemilliM
NIMXAM
N02
A--02.1
1A50.051.0
2A08.050.1
b91.003.0
c90.002.0
D04.606.6
ECISAB04.6
1E03.405.4
eCISAB56.0
L54.057.0
α
°
8
aaa--01.0
Reference Document: JEDEC Publication 95, MO-153

874003AGI-02LF

Mfr. #:
Manufacturer:
IDT
Description:
Clock Synthesizer / Jitter Cleaner PCI EXPRESS JITTER ATTENUATOR
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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