OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

MC88915TFN55

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21
4
MOTOROLA
MC88915TFN55 and MC88915TFN70
SYNC INPUT TIMING REQUIREMENTS
Minimum
Symbol Parameter TFN70 TFN55 Maximum Unit
t
RISE/FALL
,SYNC Inputs Rise/Fall Time, SYNC Inputs
From 0.8 to 2.0V
— — 3.0 ns
t
CYCLE
, SYNC Inputs Input Clock Period SYNC Inputs 28.5
1
36.0
1
200
2
ns
Duty Cycle SYNC Inputs Input Duty Cycle SYNC Inputs 50% ±25%
1. These t
CYCLE
minimum values are valid when ‘Q’ output is fed back and connected to the FEEDBACK pin. This is the configuration shown in
Figure 5b.
2. Information in Table 1 and in Note 3 of the AC specification notes describe this specification and its limits depending on what output is fed back,
and if FREQ_SEL is high or low.
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND) T
A
=–40° C to +85° C for 55MHz Version; T
A
=0° C to +70° C for 70MHz Version; V
CC
= 5.0 V ± 5%
Symbol
Parameter Test Conditions
V
CC
V
Target Limit Unit
V
IH
Minimum High–Level Input
Voltage
V
out
= 0.1 V or V
CC
– 0.1 V 4.75
5.25
2.0
2.0
V
V
IL
Maximum Low–Level Input
Voltage
V
out
= 0.1 V or V
CC
– 0.1 V 4.75
5.25
0.8
0.8
V
V
OH
Minimum High–Level Output
Voltage
V
in
= V
IH
or V
IL
I
OH
= –36 mA
1
4.75
5.25
4.01
4.51
V
V
OL
Maximum Low–Level Output
Voltage
V
in
= V
IH
or V
IL
I
OL
= 36 mA
1
4.75
5.25
0.44
0.44
V
I
in
Maximum Input Leakage Current V
I
= V
CC
or GND 5.25 ±1.0 µA
I
CCT
Maximum I
CC
/Input V
I
= V
CC
– 2.1 V 5.25
2.0
2
mA
I
OLD
Minimum Dynamic Output Current
3
V
OLD
= 1.0V Max 5.25 88 mA
I
OHD
V
OHD
= 3.85V Min 5.25 –88 mA
I
CC
Maximum Quiescent Supply
Current (per Package)
V
I
= V
CC
or GND 5.25 1.0 mA
I
OZ
Maximum 3–State Leakage Current V
I
= V
IH
or V
IL
;V
O
= V
CC
or GND 5.25 ±50
4
µA
1. I
OL
and I
OH
are 12mA and –12mA respectively for the LOCK output.
2. The PLL_EN input pin is not guaranteed to meet this specification.
3. Maximum test duration is 2.0ms, one output loaded at a time.
4. Specification value for I
OZ
is preliminary, will be finalized upon ‘MC’ status.
CAPACITANCE AND POWER SPECIFICATIONS
Symbol Parameter Typical Values Unit Conditions
C
IN
Input Capacitance 4.5 pF V
CC
= 5.0 V
C
PD
Power Dissipation Capacitance 40 pF V
CC
= 5.0 V
PD
1
Power Dissipation @ 50MHz with 50Ω Thevenin Termination 23mW/Output
184mW/Device
mW V
CC
= 5.0 V
T = 25°C
PD
2
Power Dissipation @ 50MHz with 50Ω Parallel Termination to GND 57mW/Output
456mW/Device
mW V
CC
= 5.0 V
T = 25° C
NOTE: PD
1
and PD
2
mW/Output numbers are for a ‘Q’ output.
5
MOTOROLA
MC88915TFN55 and MC88915TFN70 (continued)
FREQUENCY SPECIFICATIONS (T
A
=–40° C to +85° C, V
CC
= 5.0 V ±5%)
Guaranteed Minimum
Symbol Parameter TFN70 TFN55 Unit
f
max
1
Maximum Operating Frequency (2X_Q Output) 70 55 MHz
Maximum Operating Frequency (Q0–Q4,Q5 Output) 35 27.5 MHz
1. Maximum Operating Frequency is guaranteed with the part in a phase–locked condition, and all outputs loaded with 50Ω terminated to V
CC
/2.
AC CHARACTERISTICS (T
A
=–40° C to +85° C, V
CC
= 5.0V ±5%, Load = 50Ω Terminated to V
CC
/2)
Symbol
Parameter Min Max Unit Condition
t
RISE/FALL
Outputs
Rise/Fall Time, All Outputs
(Between 0.2V
CC
and 0.8V
CC
)
1.0 2.5 ns Into a 50Ω Load
Terminated to V
CC
/2
t
RISE/FALL
1
2X_Q Output
Rise/Fall Time Into a 20pF Load, With Ter-
mination Specified in Note
2
0.5 1.6 ns t
RISE
: 0.8V – 2.0V
t
FALL
: 2.0V – 0.8V
t
PULSE
WIDTH
1
(Q0–Q4, Q5, Q/2)
Output Pulse Width: Q0, Q1, Q2, Q3, Q4,
Q5
, Q/2 @ V
CC
/2
0.5t
CYCLE
– 0.5
2
0.5t
CYCLE
+ 0.5
2
ns Into a 50Ω Load
Terminated to V
CC
/2
t
PULSE
WIDTH
1
(2X_Q Output)
Output Pulse Width: 66MHz
2X_Q @ 1.5V 50MHz
40MHz
0.5t
CYCLE
– 0.5
2
0.5t
CYCLE
– 1.0
0.5t
CYCLE
– 1.5
0.5t
CYCLE
+ 0.5
2
0.5t
CYCLE
+ 1.0
0.5t
CYCLE
+ 1.5
ns Must Use Termination
Specified in Note 2
t
PULSE
WIDTH
1
(2X_Q Output)
Output Pulse Width: 50–65MHz
2X_Q @ V
CC
/2 40–49MHz
66–70MHz
0.5t
CYCLE
– 1.0
2
0.5t
CYCLE
– 1.5
0.5t
CYCLE
– 0.5
0.5t
CYCLE
+ 1.0
2
0.5t
CYCLE
+ 1.5
0.5t
CYCLE
+ 0.5
ns Into a 50Ω Load
Terminated to V
CC
/2
t
PD
1,3
SYNC F db k
SYNC Input to Feedback Delay
(M d t SYNC0 1 d
(With 1MΩ from RC1 to An V
CC
)
ns See Note 4 and
Fi 2f Dtild
SYNC Feedback (Measured at SYNC0 or 1 and
FEEDBACK Input Pins)
–1.05 –0.40
Figure 2 for Detailed
Explanation
FEEDBACK
In ut
Pins)
(With 1MΩ from RC1 to An GND)
Ex lanation
+1.25 +3.25
t
SKEWr
1,4
(Rising) See Note
5
Output–to–Output Skew Between Outputs
Q0–Q4, Q/2 (Rising Edges Only)
— 500 ps All Outputs Into a
Matched 50Ω Load
Terminated to V
CC
/2
t
SKEWf
1,4
(Falling)
Output–to–Output Skew Between Outputs
Q0–Q4 (Falling Edges Only)
— 500 ps All Outputs Into a
Matched 50Ω Load
Terminated to V
CC
/2
t
SKEWall
1,4
Output–to–Output Skew 2X_Q, Q/2,
Q0–Q4 Rising, Q5
Falling
— 750 ps All Outputs Into a
Matched 50Ω Load
Terminated to V
CC
/2
t
LOCK
5
Time Required to Acquire Phase–Lock
From Time SYNC Input Signal is
Received
1.0 10 ms Also Time to LOCK
Indicator High
t
PZL
6
Output Enable Time OE/RST to 2X_Q,
Q0–Q4, Q5
, and Q/2
3.0 14 ns Measured With the
PLL_EN Pin Low
t
PHZ
,t
PLZ
6
Output Disable Time OE/RST to 2X_Q,
Q0–Q4, Q5
, and Q/2
3.0 14 ns Measured With the
PLL_EN Pin Low
1. These specifications are not tested, they are guaranteed by statistcal characterization. See AC specification Note 1.
2. T
CYCLE
in this spec is 1/Frequency at which the particular output is running.
3. The T
PD
specification’s min/max values may shift closer to zero if a larger pullup resistor is used.
4. Under equally loaded conditions and at a fixed temperature and voltage.
5. With V
CC
fully powered–on, and an output properly connected to the FEEDBACK pin. t
LOCK
maximum is with C1 = 0.1µF, t
LOCK
minimum is with
C1 = 0.01µF.
6. The t
PZL
, t
PHZ
, t
PLZ
minimum and maximum specifications are estimates, the final guaranteed values will be available when ‘MC’ status is reached.
6
MOTOROLA
MC88915TFN100
SYNC INPUT TIMING REQUIREMENTS
Symbol Parameter Minimum Maximum Unit
t
RISE/FALL
,SYNC Inputs Rise/Fall Time, SYNC Inputs From 0.8 to 2.0V — 3.0 ns
t
CYCLE
, SYNC Inputs Input Clock Period SYNC Inputs 20.0
1
200
2
ns
Duty Cycle SYNC Inputs Input Duty Cycle SYNC Inputs 50% ±25%
1. These t
CYCLE
minimum values are valid when ‘Q’ output is fed back and connected to the FEEDBACK pin. This is the configuration shown in
Figure 5b.
2. Information in Table 1 and in Note 3 of the AC specification notes describe this specification and its limits depending on what output is fed back,
and if FREQ_SEL is high or low.
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND) T
A
=–40° C to +85° C, V
CC
= 5.0 V ± 5%
Symbol
Parameter Test Conditions
V
CC
V
Target Limit Unit
V
IH
Minimum High–Level Input
Voltage
V
out
= 0.1 V or V
CC
– 0.1 V 4.75
5.25
2.0
2.0
V
V
IL
Maximum Low–Level Input
Voltage
V
out
= 0.1 V or V
CC
– 0.1 V 4.75
5.25
0.8
0.8
V
V
OH
Minimum High–Level Output
Voltage
V
in
= V
IH
or V
IL
I
OH
= –36 mA
1
4.75
5.25
4.01
4.51
V
V
OL
Maximum Low–Level Output
Voltage
V
in
= V
IH
or V
IL
I
OL
= 36 mA
1
4.75
5.25
0.44
0.44
V
I
in
Maximum Input Leakage Current V
I
= V
CC
or GND 5.25 ±1.0 µA
I
CCT
Maximum I
CC
/Input V
I
= V
CC
– 2.1 V 5.25
2.0
2
mA
I
OLD
Minimum Dynamic Output Current
3
V
OLD
= 1.0V Max 5.25 88 mA
I
OHD
V
OHD
= 3.85V Min 5.25 –88 mA
I
CC
Maximum Quiescent Supply
Current (per Package)
V
I
= V
CC
or GND 5.25 1.0 mA
I
OZ
Maximum 3–State Leakage Current V
I
= V
IH
or V
IL
;V
O
= V
CC
or GND 5.25 ±50
4
µA
1. I
OL
and I
OH
are 12mA and –12mA respectively for the LOCK output.
2. The PLL_EN input pin is not guaranteed to meet this specification.
3. Maximum test duration is 2.0ms, one output loaded at a time.
4. Specification value for I
OZ
is preliminary, will be finalized upon ‘MC’ status.
CAPACITANCE AND POWER SPECIFICATIONS
Symbol Parameter Typical Values Unit Conditions
C
IN
Input Capacitance 4.5 pF V
CC
= 5.0 V
C
PD
Power Dissipation Capacitance 40 pF V
CC
= 5.0 V
PD
1
Power Dissipation @ 50MHz with 50Ω Thevenin Termination 23mW/Output
184mW/Device
mW V
CC
= 5.0 V
T = 25°C
PD
2
Power Dissipation @ 50MHz with 50Ω Parallel Termination to GND 57mW/Output
456mW/Device
mW V
CC
= 5.0 V
T = 25° C
NOTE: PD
1
and PD
2
mW/Output numbers are for a ‘Q’ output.
FREQUENCY SPECIFICATIONS (T
A
=–40° C to +85° C, V
CC
= 5.0 V ±5%)
Guaranteed Minimum
Symbol Parameter TFN100 Unit
f
max
1
Maximum Operating Frequency (2X_Q Output) 100 MHz
Maximum Operating Frequency (Q0–Q4,Q5 Output) 50 MHz
1. Maximum Operating Frequency is guaranteed with the part in a phase–locked condition, and all outputs loaded with 50Ω terminated to V
CC
/2.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21

MC88915TFN55

Mfr. #:
Buy MC88915TFN55
Manufacturer:
NXP Semiconductors
Description:
IC DRIVER CLK PLL 55MHZ 28-PLCC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet