February 1996
NDS9953A
Dual P-Channel Enhancement Mode Field Effect Transistor
General Description Features
________________________________________________________________________________
Absolute Maximum Ratings T
A
= 25°C unless otherwise noted
Symbol Parameter NDS9953A Units
V
DSS
Drain-Source Voltage -30 V
V
GSS
Gate-Source Voltage ± 20 V
I
D
Drain Current - Continuous (Note 1a) ± 2.9 A
- Pulsed ± 10
P
D
Power Dissipation for Dual Operation 2 W
Power Dissipation for Single Operation (Note 1a) 1.6
(Note 1b) 1
(Note 1c) 0.9
T
J
,T
STG
Operating and Storage Temperature Range -55 to 150 °C
THERMAL CHARACTERISTICS
R
θ
JA
Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W
R
θ
JC
Thermal Resistance, Junction-to-Case (Note 1) 40 °C/W
NDS9953A.SAM
-2.9A, -30V. R
DS(ON)
= 0.13Ω @ V
GS
= -10V.
High density cell design for extremely low R
DS(ON)
.
High power and current handling capability in a widely used
surface mount package.
Dual MOSFET in surface mount package.
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high
cell density, DMOS technology. This very high density
process is especially tailored to minimize on-state resistance,
provide superior switching performance, and withstand high
energy pulses in the avalanche and commutation modes.
These devices are particularly suited for low voltage
applications such as notebook computer power management
and other battery powered circuits where fast switching, low
in-line power loss, and resistance to transients are needed.
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© 1997 Fairchild Semiconductor Corporation
