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LTC4280CUFD#PBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P28
LTC4280
22
4280f
APPLICATIONS INFORMATION
S ADDRESS
1 0 a4:a0
4280 F07
FROM MASTER TO SLAVE
FROM SLAVE TO MASTER
A: ACKNOWLEDGE (LOW)
A: NOT ACKNOWLEDGE (HIGH)
R: READ BIT (HIGH)
W: WRITE BIT (LOW)
S: START CONDITION
P: STOP CONDITION
COMMAND DATA
X X X X X b2:b00
W
000b7:b0
A A AP
Figure 7. LTC4280 Serial Bus SDA Write Byte Protocol
S ADDRESS
1 0 a4:a0
COMMAND DATA DATA
X X X X X b2:b00
W
000 0
4280 F08
X X X X X X X Xb7:b0
A
A A AP
Figure 8. LTC4280 Serial Bus SDA Write Word Protocol
S ADDRESS
1 0 a4:a0 1 0 a4:a0 1 0
COMMAND S ADDRESS R A
b7:b0 1
DATA
X X X X X b2:b00
W
00
4280 F09
A A A P
Figure 9. LTC4280 Serial Bus SDA Read Byte Protocol
S ADDRESS
1 0 a4:a0 1 0 a4:a0 1 0
COMMAND S ADDRESS R A
b7:b0 1
DATA
X X X X X b2:b00
W
00
4280 F10
A
0
A
b7:b0
DATA
A A P
Figure 10. LTC4280 Serial Bus SDA Read Word Protocol
S
ALERT
RESPONSE
ADDRESS
0 0 0 1 1 0 0
DEVICE
ADDRESS
1 0 a4:a0 0 11
R
0
4280 F11
A A
P
Figure 11. LTC4280 Serial Bus SDA Alert Response Protocol
LTC4280
23
4280f
Table 1. LTC4280 Device Addressing (UH24 Package)
DESCRIPTION
DEVICE
ADDRESS DEVICE ADDRESS
LTC4280UH
ADDRESS PINS
h 76543210ADR2ADR1ADR0
Mass Write BE 10111110XXX
Alert Response 19 00011001XXX
0 80 1000000XLNCL
1 82 1000001XLHNC
2 84 1000010XLNCNC
3 86 1000011XLNCH
4 88 1000100XLLL
5 8A 1000101XLHH
6 8C 1000110XLLNC
7 8E 1000111XLLH
8 90 1001000XNCNCL
9 92 1001001XNCHNC
10 94 1001010XNCNCNC
11 96 1001011XNCNCH
12 98 1001100XNCLL
13 9A 1001101XNCHH
14 9C 1001110XNCLNC
15 9E 1001111XNCLH
16 A0 1010000XHNCL
17 A2 1010001XHHNC
18 A4 1010010XHNCNC
19 A6 1010011XHNCH
20 A8 1010100XHLL
21 AA 1010101XHHH
22 AC 1010110XHLNC
23 AE 1010111XHLH
24 B0 1011000XLHL
25 B2 1011001XNCHL
26 B4 1011010XHHL
APPLICATIONS INFORMATION
LTC4280
24
4280f
APPLICATIONS INFORMATION
Table 2. CONTROL Register A (00h)—Read/Write
BIT NAME OPERATION
A7:6 GPIO Confi gure
FUNCTION A6 A7 GPIO PIN
Power Good (Default) 0 0 GPIO = C3
Power Good 0 1 GPIO = C3
General Purpose Output 1 0 GPIO = B6
General Purpose Input 1 1 C6 = GPIO
A5 Test Mode Enable Enables Test Mode to Disable the ADC; 1 = ADC Disable, 0 = ADC Enable (Default)
A4 Mass Write Enable Allows Mass Write Addressing; 1 = Mass Write Enabled (Default), 0 = Mass Write Disabled
A3 FET On Control On Control Bit Latches the State of the ON Pin at the End of the Debounce Delay; 1 = FET On, 0 = FET Off
A2 Overcurrent
Auto-Retry
Overcurrent Auto-Retry Bit; 1 = Auto-Retry After Overcurrent, 0 = Latch Off After Overcurrent
A1 Undervoltage
Auto-Retry
Undervoltage Auto-Retry; 1 = Auto-Retry After Undervoltage (Default), 0 = Latch Off After Undervoltage
A0 Overvoltage
Auto-Retry
Overvoltage Auto-Retry; 1 = Auto-Retry After Overvoltage (Default), 0 = Latch Off After Overvoltage
Table 3. ALERT Register B (01h)—Read/Write
BIT NAME OPERATION
B7 Reserved Not Used
B6 GPIO Output Output Data Bit to GPIO Pin when Confi gured as Output. Defaults to 0
B5 FET Short Alert Enables Alert for FET Short Condition; 1 = Enable Alert, 0 = Disable Alert (Default)
B4 EN State
Change Alert
Enables Alert when EN Changes State; 1 = Enable Alert, 0 Disable Alert (Default)
B3 Power Bad
Alert
Enables Alert when Output Power is Bad; 1 = Enable Alert, 0 Disable Alert (Default)
B2 Overcurrent
Alert
Enables Alert for Overcurrent Condition; 1 = Enable Alert, 0 Disable Alert (Default)
B1 Undervoltage
Alert
Enables Alert for Undervoltage Condition; 1 = Enable Alert, 0 Disable Alert (Default)
B0 Overvoltage
Alert
Enables Alert for Overvoltage Condition; 1 = Enable Alert, 0 Disable Alert (Default)
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P28

LTC4280CUFD#PBF

Mfr. #:
Buy LTC4280CUFD#PBF
Manufacturer:
Analog Devices Inc.
Description:
Hot Swap Voltage Controllers Hot Swap Contr. w/ADC and I2C, 3 GPIOs
Lifecycle:
New from this manufacturer.
Delivery:
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