LTC2933
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operaTion
Figure 1. 1% Threshold Accuracy Improves System Reliability
NOMINAL SUPPLY VOLTAGE
SUPPLY TOLERANCE
MINIMUM RELIABLE
SYSTEM VOLTAGE
2933 F01
5V
4.5V
4.4V
4.45V
–10%
–12%
–11%
REGION OF POTENTIAL MALFUNCTION
IDEAL SUPERVISOR
THRESHOLD
The LTC2933 can perform the following operations:
Accept I
2
C bus programming commands.
Simultaneously monitor up to six inputs with respect
to programmed fault limits.
Configure and monitor for OV/UV faults using two
independent comparators per channel.
Configure two general purpose inputs as manual reset
(MR), undervoltage disable (UVDIS), margin (MARG)
or auxiliary comparator (AUXC) inputs.
Configure three general purpose inputs/outputs
(GPIO
n
) to output faults, inputs from GPI
n
or from
other GPIO
n
.
Independently select each general purpose output
polarity and type (open-drain or weak pull-up).
Independently select each general purpose output
response delay-on-release (with respect to the mo
-
ment its condition is internally cleared).
Generate interrupt (ALERT) signals in response to any
voltage faults, as well as the logic state of the inputs.
Store register contents to EEPROM.
Store voltage and timing fault history to EEPROM.
Restore EEPROM contents into the operating memory,
by I
2
C command and at power-up.
Report voltage fault status and history.
Software write-protect the operating memory.
Threshold Accuracy
The LTC2933 ±1% threshold accuracy specification
improves the reliability of the system over supervisors
with wider threshold tolerances. A less accurate voltage
supervisor increases the required system voltage margin.
This in turn increases the probability of system malfunction.
Consider a 5V ±10% supply: it may vary between 4.5V and
5.5V and the circuitry powered by it must operate reliably
within this band. An ideal, perfectly accurate supervisor
would generate a reset at exactly 4.5V. The LTC2933
threshold varies ±1% around the nominal threshold volt
-
age, in the medium range, if the selected value is greater
than 3V. The reset threshold band and the power supply
tolerance bands should not overlap, in order to prevent
false
alarms when the power supply actually meets its
specified tolerance band (see Figure 1).
A ±10% threshold is usually set to 11% below the nominal
input voltage, or 4.45V in this example. The threshold is
guaranteed to be within the 4.4V to 4.5V band over tem
-
perature. To prevent malfunction, the powered system
must operate reliably down to
4.4V.
LTC2933
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operaTion
I
2
C Serial Digital Interface
The LTC2933 communicates with a host (master) using
the I
2
C serial bus interface. The Timing Diagram shows
the timing relationship of the signals on the bus. The two
bus lines, SDA and SCL, must be high when the bus is
not in use. External pull-up resistors or current sources
are required on these lines.
The LTC2933 is a transmit/receive slave-only device. The
master device must initiate data transfer on the bus by
generating SCL to allow the transfer. In the event of an
OV/UV fault, the LTC2933 can be configured to assert the
ALERT output low in order to notify the host.
Slave Address
The LTC2933 can respond to one of three addresses. By
connecting the address ASEL input to V
DD33
, GND, or by
floating it, the slave address is determined as shown in
the following table. The LTC2933 always responds to the
special addresses.
LTC2933 Slave Address Table
ASEL 0 HI-Z 1
7-Bit Address 0x1C 0x1D 0x1E
8-Bit Address 0x38 0x3A 0x3C
LTC2933 Special Slave Addresses
7-Bit
Address
8-Bit
Address Description
0x0C 0x19 Alert Response Address. Independent of the ASEL pin.
0x1B 0x36 Global address to which all LTC2933’s will respond. Independent of the ASEL pin.
SLAVE ADDRESS Wr A A PS
7 81 1 1 11
COMMAND CODE
SLAVE ADDRESS COMMAND CODE DATA BYTE LOWWr A A A PS
7 8 8 1
DATA BYTE HIGH
81 1 1 1 11
A
SLAVE ADDRESS COMMAND CODE SLAVE ADDRESSWr A A A P
2933 F00
S
7 8 7 1
DATA BYTE LOW
8
DATA BYTE HIGH
811 1 1
Sr
1 1
1
11
A
1
Rd A
Communication Protocols
Send Byte Format
Write Word Format
Read Word Format
S
Sr
Rd
Wr
A
P
START CONDITION
REPEATED START CONDITION
READ (BIT VALUE OF 1)
WRITE (BIT VALUE OF 0)
ACKNOWLEDGE (THIS BIT POSITION MAY BE 0
FOR AN ACK OR 1 FOR A NACK)
STOP CONDITION
MASTER TO SLAVE
SLAVE TO MASTER
LTC2933
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Register Command Set
COMMAND
FUNCTION DESCRIPTION
R/W/S
(See Note)
DAT
A LENGTH
(BITS)
COMMAND
BYTE DEFAULT VALUE
WRITE_PROTECT Contains lock key code and write lock. R/W 16 0x00 1010_1010_1010_1000b
GPI_CONFIG Configure GPI2 and GPI1 assignment, GPIOn mapping
and MR internal response.
R/W 16 0x01 X001_0000_X000_0000b
GPIO1_CONFIG Configure GPIO1 type, delay-on-release and mapping to
GPIO2, GPIO3.
R/W 16 0x02 X000_0000_0010_1011b
GPIO2_3_CONFIG Configure GPIO3 type, delay-on-release and mapping
to GPIO1 and GPIO2. Configure GPIO2 type, delay-on-
release and mapping to GPIO1 and GPIO3.
R/W 16 0x03 0010_1011_0010_1011b
V1_THR Encode high and low voltage thresholds on channel V1. R/W 16 0x04 1101_1110_1010_1000b
V2_THR Encode high and low voltage thresholds on channel V2. R/W 16 0x05 1110_1001_1011_0001b
V3_THR Encode high and low voltage thresholds on channel V3. R/W 16 0x06 1000_1011_0110_0101b
V4_THR Encode high and low voltage thresholds on channel V4. R/W 16 0x07 1110_1001_1011_0001b
V5_THR Encode high and low voltage thresholds on channel V5 R/W 16 0x08 1001_1011_0111_0011b
V6_THR Encode high and low voltage thresholds on channel V6. R/W 16 0x09 0111_1010_0101_1000b
V1_CONFIG Encode comparator range, polarity and GPIO
n
mapping. R/W 16 0x0A XXXX_XX00_1000_1001b
V2_CONFIG Encode comparator range, polarity and GPIO
n
mapping. R/W 16 0x0B XXXX_XX00_1000_1001b
V3_CONFIG Encode comparator range, polarity and GPIO
n
mapping. R/W 16 0x0C XXXX_XX00_1000_1001b
V4_CONFIG Encode comparator range, polarity and GPIO
n
mapping. R/W 16 0x0D XXXX_XX01_1000_1001b
V5_CONFIG Encode comparator range, polarity and GPIO
n
mapping. R/W 16 0x0E XXXX_XX01_1000_1001b
V6_CONFIG Encode comparator range, polarity and GPIO
n
mapping. R/W 16 0x0F XXXX_XX01_1000_1001b
HISTORY_WORD Read the fault history. Read only. R 16 0x11 NA
CLEAR_HISTORY Clear volatile memory history register. Write only. S 0 0x1B NA
STORE_USER Store volatile memory to EEPROM. Write only. S 0 0x1C NA
RESTORE_USER
Restore volatile memory from EEPROM. Write only.
S 0 0x1D NA
BACKUP_WORD
Read the EEPROM backup of the first fault history.
Read only.
R 16 0x1E NA
STATUS_WORD
Read the fault status. Read only
.
R 16 0x1F NA
Note: R = read, W = write, S = send byte
operaTion

LTC2933CGN#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Supervisory Circuits Programmable Hex Voltage Supervisor (w/ High Voltage Input)
Lifecycle:
New from this manufacturer.
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