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CY7C1019CV33-10ZXA

P1-P3P4-P6P7-P9P10-P12P13-P14
CY7C1019CV33
Document Number: 38-05130 Rev. *O Page 7 of 14
Switching Waveforms
Figure 3. Read Cycle No. 1
[11, 12]
Figure 4. Read Cycle No. 2 (OE Controlled)
[12, 13]
Figure 5. Write Cycle No. 1 (CE Controlled)
[14, 15]
PREVIOUS DATA VALID DATA VALID
t
RC
t
AA
t
OHA
ADDRESS
DATA OUT
50%
50%
DATA VALID
t
RC
t
ACE
t
DOE
t
LZOE
t
LZCE
t
PU
HIGH IMPEDANCE
t
HZOE
t
HZCE
t
PD
HIGH
OE
CE
ICC
ISB
IMPEDANCE
ADDRESS
DATA OUT
V
CC
SUPPLY
CURRENT
t
WC
DATA VALID
t
AW
t
SA
t
PWE
t
HA
t
HD
t
SD
t
SCE
t
SCE
CE
ADDRESS
WE
DATA I/O
Notes
11. Device is continuously selected. OE
, CE = V
IL
.
12. WE
is HIGH for read cycle.
13. Address valid prior to or coincident with CE
transition LOW.
14. Data I/O is high impedance if OE
= V
IH
.
15. If CE
goes HIGH simultaneously with WE going HIGH, the output remains in a high impedance state.
CY7C1019CV33
Document Number: 38-05130 Rev. *O Page 8 of 14
Figure 6. Write Cycle No. 2 (WE Controlled, OE HIGH During Write)
[16, 17]
Figure 7. Write Cycle No. 3 (WE Controlled, OE LOW)
[17, 18]
Switching Waveforms (continued)
t
HD
t
SD
t
PWE
t
SA
t
HA
t
AW
t
SCE
t
WC
t
HZOE
DATA
IN
VALID
CE
ADDRESS
WE
DATA I/O
OE
NOTE 19
DATA VALID
t
HD
t
SD
t
LZWE
t
PWE
t
SA
t
HA
t
AW
t
SCE
t
WC
t
HZWE
CE
ADDRESS
WE
DATA I/O
NOTE
19
Notes
16. Data I/O is high impedance if OE
= V
IH
.
17. If CE
goes HIGH simultaneously with WE going HIGH, the output remains in a high impedance state.
18. The minimum write cycle pulse width should be equal to the sum of t
SD and tHZWE.
19. During this period the I/Os are in the output state and input signals should not be applied.
CY7C1019CV33
Document Number: 38-05130 Rev. *O Page 9 of 14
Ordering Code Definitions
Truth Table
CE OE WE
I/O
0
–I/O
7
Mode Power
H X X High Z Power Down Standby (I
SB
)
L L H Data Out Read Active (I
CC
)
L X L Data In Write Active (I
CC
)
L H H High Z Selected, Outputs Disabled Active (I
CC
)
Ordering Information
Speed
(ns)
Ordering Code
Package
Diagram
Package Type
Operating
Range
10 CY7C1019CV33-10ZXA 51-85095 32-pin TSOP II (Pb-free) Automotive-A
CY7C1019CV33-10ZXAT 51-85095 32-pin TSOP II (Pb-free)
X = T or Blank
T = Tape and Reel; Blank = Tube
Temperature Range:
A = Automotive-A
Pb-free
Package Type:
Z = 32-pin TSOP II
Speed Grade: 10 ns
V33 = 3.3 V
Process Technology 0.16 µm
Part Identifier
Technology Code: C = CMOS
Marketing Code: 7 = SRAM
Company ID: CY = Cypress
C 1019 C - 10 X AV33 XCY 7 Z
P1-P3P4-P6P7-P9P10-P12P13-P14

CY7C1019CV33-10ZXA

Mfr. #:
Buy CY7C1019CV33-10ZXA
Manufacturer:
Cypress Semiconductor
Description:
SRAM 1Mb 128K x 8 Fast Async SRAM
Lifecycle:
New from this manufacturer.
Delivery:
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