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Table 3. ATTRIBUTES
Characteristics Value
ESD Protection Human Body Model
Machine Model
> 2 kV
> 200 V
R
PU
SELx Input Pullup Resistor
56 kW
Moisture Sensitivity (Note 3) QFN32 Level 1
Flammability Rating Oxygen Index: 28 to 34 UL 94 V0 @ 0.125 in
Transistor Count 268
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
3. For additional information, see Application Note AND8003/D.
Table 4. MAXIMUM RATINGS
Symbol Parameter Condition 1 Condition 2 Rating Unit
V
CC
Positive Power Supply GND = 0 V 0.5 to +4.0 V
V
IN
Positive Input Voltage GND = 0 V 0.5 to V
CC
+0.5 V
V
INPP
Differential Input Voltage |IN – IN| 1.89 V
I
OUT
LVPECL Output Current Continuous
Surge
50
100
mA
I
IN
Input current Through RT (50 W resistor)
$40 mA
I
VREFAC
V
REFAC
Sink or Source Current $1.5 mA
T
A
Operating Temperature Range 40 to +85 °C
T
stg
Storage Temperature Range 65 to +150 °C
q
JA
Thermal Resistance (JunctiontoAmbient) (Note 4) 0 lfpm
500 lfpm
QFN32
QFN32
31
27
°C/W
q
JC
Thermal Resistance (JunctiontoCase) (Note 4) QFN32 12 °C/W
T
sol
Wave Solder v 20 sec 265 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
4. JEDEC standard multilayer board – 2S2P (2 signal, 2 power) with 8 filled thermal vias under exposed pad.
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Table 5. DC CHARACTERISTICS POSITIVE LVPECL OUTPUT V
CC
= 2.375 V to 2.625 V, 3.0 V to 3.6 V, GND = 0 V,
T
A
= 40°C to +85°C (Note 5)
Symbol
Characteristic Min Typ Max Unit
POWER SUPPLY
V
CC
Power Supply Voltage V
CC
= 2.5 V
V
CC
= 3.3 V
2.375
3.0
2.5
3.3
2.625
3.6
V
I
CC
Power Supply Current for V
CC
(Inputs and Outputs Open) 100 125 mA
LVPECL OUTPUTS
V
OH
Output HIGH Voltage (Note 6)
V
CC
= 2.5 V
V
CC
= 3.3 V
V
CC
– 1145
1355
2155
V
CC
– 900
1600
2400
V
CC
– 800
1700
2500
mV
V
OL
Output LOW Voltage (Note 6)
V
CC
= 2.5 V
V
CC
= 3.3 V
V
CC
– 2000
500
1300
V
CC
1700
800
1600
V
CC
– 1500
1000
1800
mV
DIFFERENTIAL CLOCK INPUTS DRIVEN SINGLEENDED (Note 7) (Figures 9 and 10)
V
IH
Singleended Input HIGH Voltage V
th
+ 100 V
CC
mV
V
IL
Singleended Input LOW Voltage GND V
th
– 100 mV
V
th
Input Threshold Reference Voltage Range (Note 8) 1100 V
CC
– 100 mV
V
ISE
Singleended Input Voltage (V
IH
– V
IL
) 200 V
CC
mV
VREFAC
V
REFAC
Output Reference Voltage (100 mA Load)
V
CC
– 1300 V
CC
– 1100 V
CC
– 900 mV
DIFFERENTIAL INPUTS DRIVEN DIFFERENTIALLY (Note 9) (Figures 11 and 12)
V
IHD
Differential Input HIGH Voltage (IN
x
, IN
x
) 1200 V
CC
mV
V
ILD
Differential Input LOW Voltage (IN
x
, IN
x
) 0 V
IHD
– 100 mV
V
ID
Differential Input Voltage (IN
x
, IN
x
) (V
IHD
– V
ILD
) 100 1200 mV
V
CMR
Input Common Mode Range (Differential Configuration)
(Note 10) (Figure 13)
1150 V
CC
– 50 mV
I
IH
Input HIGH Current IN
x
/IN
x
(VT
x
/VT
x
Open) 150 150
mA
I
IL
Input LOW Current IN
x
/IN
x
(VT
x
/VT
x
Open) 150 150
mA
CONTROL INPUT (SELx Pin)
V
IH
Input HIGH Voltage for Control Pin 2.0 V
CC
V
V
IL
Input LOW Voltage for Control Pin GND 0.8 V
I
IH
Input HIGH Current 150 150
mA
I
IL
Input LOW Current 150 150
mA
TERMINATION RESISTORS
R
TIN
Internal Input Termination Resistor (Measured from INx to VTx) 45 50 55
W
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
5. Input and Output parameters vary 1:1 with V
CC
.
6. LVPECL outputs loaded with 50 W to V
CC
2 V for proper operation.
7. Vth, V
IH
, V
IL,,
and V
ISE
parameters must be complied with simultaneously.
8. Vth is applied to the complementary input when operating in singleended mode.
9. V
IHD
, V
ILD,
V
ID
and V
CMR
parameters must be complied with simultaneously.
10.V
CMR
min varies 1:1 with GND, V
CMR
max varies 1:1 with V
CC
. The V
CMR
range is referenced to the most positive side of the differential
input signal.
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Table 6. AC CHARACTERISTICS V
CC
= 2.375 V to 2.625 V, 3.0 V to 3.6 V, GND = 0 V, T
A
= 40°C to +85°C (Note 11)
Symbol Characteristic Min Typ Max Unit
f
MAX
Maximum Input Clock Frequency V
OUT
w 400 mV 6 7 GHz
f
DATAMAX
Maximum Operating Data Rate NRZ, (PRBS23) 10 11 Gbps
f
SEL
Maximum Toggle Frequency, SELx 4 10 MHz
V
OUTPP
Output Voltage Amplitude (@ V
INPPmin
) f
in
6 GHz (Note 11) (Figures 3 and 14) 400 800 mV
t
PLH
,
t
PHL
Propagation Delay to Differential Outputs
Measured at Differential Crosspoint
INx/INx to Qx/Qx @1 GHz
@ 50 MHz SELn to Qx
75 160
5
250
10
ps
ns
t
PD
Temp co
Differential Propagation Delay Temperature Coefficient 100
Dfs/°C
tskew Output – Output skew (within device) (Note 13)
Device – Device skew (t
pdmax
– t
pdmin
)
0
30
15
100
ps
t
DC
Output Clock Duty Cycle (Reference Duty Cycle = 50%) f
in
= 1 GHz 45 50 55 %
F
N
Phase Noise, f
C
= 1 GHz 10 kHz
100 kHz
1 MHz
10 MHz
20 MHz
135
136
148
148
148
dBc
t
JIT(
F
)
Phase Jitter (RMS) (Figure 7) f
C
= 1 GHz, 12 kHz 20 MHz 40 fs
t
JITTER
Random Clock Jitter, RJ(RMS), (Note 14) f
IN
v 7 GHz
Deterministic Jitter, DJ (Note 15) f
IN
v 10 Gbps
0.2 0.8
10
ps
Crosstalk Induced Jitter (RMS) (Adjacent Channel) (Note 16) 0.7 ps
V
INPP
Input Voltage Swing (Differential Configuration) (Note 17) 100 1200 mV
t
r,
, t
f
Output Rise/Fall Times @ 1 GHz; (20% 80%), Qx, Qx 25 50 75 ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
11. Measured using a V
INPPmin
source, 50% duty cycle clock source. All output loading with external 50 W to V
CC
2 V. Input edge rates 40 ps
(20% 80%).
12.Output voltage swing is a singleended measurement operating in differential mode.
13.Skew is measured between outputs under identical transitions and conditions. Duty cycle skew is defined only for differential operation when
the delays are measured from crosspoint of the inputs to the crosspoint of the outputs.
14.Additive RMS jitter with 50% duty cycle clock signal.
15.Additive PeaktoPeak data dependent jitter with input NRZ data at PRBS23.
16.Crosstalk is measured at the output while applying two similar clock frequencies that are asynchronous with respect to each other at the
inputs.
17.Input voltage swing is a singleended measurement operating in differential mode.
900
0
f
in
, CLOCK INPUT FREQUENCY (GHz)
Figure 3. Clock Output Voltage Amplitude (V
OUTPP
) vs. Input Frequency (f
in
) at Ambient Temperature (Typical)
8.01.0 2.0 3.0 4.0 5.0 6.0 7.0
OUTPUT VOLTAGE AMPLITUDE
(mV)
Q AMP (mV)
800
700
600
500
400
300
200
100
9.0

NB7LQ572MNG

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Clock Buffer 7 GHz160 ps3.6V 3V
Lifecycle:
New from this manufacturer.
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