SL3S1203_1213 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 4.4 — 17 March 2014
178844 10 of 37
NXP Semiconductors
SL3S1203_1213
UCODE G2iL and G2iL+
10.5 Supported commands
The G2iL supports all mandatory EPCglobal V1.2.0 commands.
In addition the G2iL supports the following optional commands:
ACCESS
Block Write (32 bit)
The G2iL features the following custom commands described more in detail later:
ResetReadProtect (backward compatible to G2X)
ReadProtect (backward compatible to G2X)
ChangeEAS (backward compatible to G2X)
EAS_Alarm (backward compatible to G2X)
ChangeConfig (new with G2iL)
10.6 G2iL, G2iL+ memory
The G2iL, G2iL+ memory is implemented according EPCglobal Class1Gen2 and
organized in three sections:
The logical address of all memory banks begin at zero (00h).
In addition to the three memory banks one configuration word to handle the G2iL specific
features is available at EPC bank 01 address 200h. The configuration word is described in
detail in Section 10.7.1 “
ChangeConfig.
Memory pages (16 bit words) pre-programmed to zero will not execute an erase cycle
before writing data to it. This approach accelerates initialization of the chip and enables
faster programming of the memory.
RF field detection - yes
Data transfer - yes
Tag tamper alarm - yes
Table 6. Overview of G2iL and G2iL+ features
…continued
Features G2iL G2iL+
Table 7. G2iL memory sections
Name Size Bank
Reserved memory (32 bit ACCESS and 32 bit KILL password) 64 bit 00b
EPC (excluding 16 bit CRC-16 and 16 bit PC) 128 bit 01b
G2iL Configuration Word 16 bit 01b
TID (including permalocked unique 32 bit serial number) 64 bit 10b
SL3S1203_1213 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 4.4 — 17 March 2014
178844 11 of 37
NXP Semiconductors
SL3S1203_1213
UCODE G2iL and G2iL+
10.6.1 G2iL, G2iL+ overall memory map
[1] See Figure 5
[2] Indicates the existence of a Configuration Word at the end of the EPC number
[3] See also Table 12
for further details.
Table 8. G2iL, G2iL+ overall memory map
Bank
address
Memory
address
Type Content Initial Remark
Bank 00 00h to 1Fh reserved kill password all 00h unlocked memory
20h to 3Fh reserved access password all 00h unlocked memory
Bank 01
EPC
00h to 0Fh EPC CRC-16: refer to Ref. 16
memory mapped
calculated CRC
10h to 14h EPC backscatter length 00110b unlocked memory
15h EPC UMI 0b unlocked memory
16h EPC XPC indicator 0b hardwired to 0
17h to 1Fh EPC numbering system indicator 00h unlocked memory
20h to 9Fh EPC EPC
[1]
unlocked memory
Bank 01
Config Word
200h EPC tamper alarm flag 0b
[3]
indicator bit
201h EPC external supply flag or input
signal
0b
[3]
indicator bit
202h EPC RFU 0b
[3]
locked memory
203h EPC RFU 0b
[3]
locked memory
204h EPC invert digital output: 0b
[3]
temporary bit
205h EPC transparent mode on/off 0b
[3]
temporary bit
206h EPC transparent mode data/raw 0b
[3]
temporary bit
207h EPC RFU 0b
[3]
locked memory
208h EPC RFU 0b
[3]
locked memory
209h EPC max. backscatter strength 1b
[3]
unlocked memory
20Ah EPC digital output 0b
[3]
unlocked memory
20Bh EPC read range reduction on/off 0b
[3]
unlocked memory
20Ch EPC RFU 0b
[3]
locked memory
20Dh EPC read protect EPC Bank 0b
[3]
unlocked memory
20Eh EPC read protect TID 0b
[3]
unlocked memory
20Fh EPC PSF alarm flag 0b
[3]
unlocked memory
Bank 10
TID
00h to 07h TID allocation class identifier 1110 0010b locked memory
08h to 13h TID tag mask designer identifier 0000 0000 0110b locked memory
14h TID config word indicator 1b
[2]
locked memory
14h to 1Fh TID tag model number TMNR
[1]
locked memory
20h to 3Fh TID serial number SNR locked memory
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx xxxxx
xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx
xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx
SL3S1203_1213 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 4.4 — 17 March 2014
178844 12 of 37
NXP Semiconductors
SL3S1203_1213
UCODE G2iL and G2iL+
10.6.2 G2iL TID memory details
Fig 5. G2iL TID memory structure
aaa-010217
E2006906 E2h 006h 1 0010b 0000110b
Ucode G2iL+ E2006807 E2h 006h 1 0000b 0000111b
E2006907 E2h 006h 1 0010b 0000111b
Ucode G2iL E2006806 E2h 006h 1 0000b 0000110b
First 32 bit of TID
memory
Class ID
Mask
Designer
ID
Config Word
Indicator
Sub
Version Nr.
Model Number
Version
(Silicon) Nr.
Class Identifier
MS Byte
MS Bit LS Bit
LS Byte
TID
MS Bit LS Bit
Mask-Designer Identifier Model Number Serial Number
000 07Bits 11 11 31
07h 13h 1Fh 3Fh00hAddresses
3Fh00hAddresses
08h 14h 20h
E2h
(EAN.UCC)
006h
(NXP)
806h or 906h or B06h
(UCODE G2iL)
00000001h to FFFFFFFFh
Sub Version Number Version Number
000b or 001b or 0110b 0000110b
(UCODE G2iL)
6003Bits 0
1Fh14h 18hAddresses 19h
E2006B06 E2h 006h 1 0110b 0000110b
E2006B07 E2h 006h 1 0110b 0000111b

SL3S1203FUF,003

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NXP Semiconductors
Description:
RFID Transponders UCODE G2IL AND G2IL+
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