ICS87004I-03 Data Sheet LVCMOS/LVTTL FANOUT BUFFER/DIVIDER
ICS87004BGI-03 REVISION A FEBRUARY 22, 2012 2 ©2012 Integrated Device Technology, Inc.
Table 1. Pin Descriptions
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Number Name Type Description
1V
DD
Power Power supply pin.
2, 3, 4 NA2, NA1, NA0 Input Pulldown N divider select pins for Bank A outputs. LVCMOS / LVTTL interface levels.
5, 7 CLK0, CLK1 Input Pulldown Single-ended clock inputs. LVCMOS / LVTTL interface levels.
6 CLK_SEL Input Pulldown Input clock selection. LVCMOS / LVTTL interface levels. See Table 6.
8, 9, 10 NB2, NB1, NB0 Input Pulldown N divider select pins for Bank B outputs. LVCMOS / LVTTL interface levels.
11 OEB Input Pullup
Output enable control input for Bank B outputs. LVCMOS / LVTTL interface
levels. See Table 5.
12, 16 GND Power Power supply core ground.
13 V
DDOB
Power Bank B output supply pin.
14, 15 QB0, QB1 Output Single-ended Bank B clock outputs. LVCMOS / LVTTL interface levels.
17, 18 QA1, QA0 Output Single-ended Bank A clock outputs. LVCMOS / LVTTL interface levels.
19 V
DDOA
Power Bank A output supply pin.
20 OEA Input Pullup
Output enable control input for Bank A outputs. LVCMOS / LVTTL interface
levels. See Table 4.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
C
IN
Input Capacitance 4pF
R
PULLDOWN
Input Pulldown Resistor 51 k
R
PULLUP
Input Pullup Resistor 51 k
C
PD
Power Dissipation Capacitance
(per output)
V
DDOA
= V
DDOB
= 3.465V 10 pF
V
DDOA
= V
DDOB
= 2.625V 10 pF
V
DDOA
= V
DDOB
= 1.95V 10 pF
R
OUT
Output Impedance
V
DDOA
= V
DDOB
= 3.3V ± 5% 17
V
DDOA
= V
DDOB
= 2.5V ± 5% 20
V
DDOA
= V
DDOB
= 1.8V ± 0.15V 28
