ICS87004I-03 Data Sheet LVCMOS/LVTTL FANOUT BUFFER/DIVIDER
ICS87004BGI-03 REVISION A FEBRUARY 22, 2012 7 ©2012 Integrated Device Technology, Inc.
Table 8C. AC Characteristics, V
DD
= 3.3V±5%, V
DDOA
= V
DDOB
= 1.8V±0.15V, T
A
= -40°C to 85°C
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device
is mounted in a test socket with maintained transverse airflow greater than 500lfpm. The device will meet specifications after thermal
equilibrium has been reached under these conditions.
All parameters measured at ƒin 250MHz
NOTE 1: Measured from V
DD
/2 of the input to V
DDOX
/2 of the output.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at V
DDOX
/2.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 4: Defined as skew between outputs on different devices operating at the same supply voltage, same frequency, same temperature and
with equal load conditions. Using the same type of input on each device, the output is measured at V
DDOX
/2.
NOTE: 5 Defined as skew within a bank with equal load conditions.
NOTE 6: These parameters are guaranteed by characterization. Not tested in production.
Table 8D. AC Characteristics, V
DD
= V
DDOA
= V
DDOB
= 2.5V±5%, T
A
= -40°C to 85°C
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device
is mounted in a test socket with maintained transverse airflow greater than 500lfpm. The device will meet specifications after thermal
equilibrium has been reached under these conditions.
All parameters measured at ƒin 250MHz unless noted otherwise.
NOTE 1: Measured from V
DD
/2 of the input to V
DDOX
/2 of the output.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at V
DDOX
/2.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 4: Defined as skew between outputs on different devices operating at the same supply voltage, same frequency, same temperature and
with equal load conditions. Using the same type of input on each device, the output is measured at V
DDOX
/2.
NOTE: 5 Defined as skew within a bank with equal load conditions.
NOTE 6: These parameters are guaranteed by characterization. Not tested in production.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
OUT
Output Frequency 250 MHz
t
PD
Propgation Delay, NOTE 1
N24.05.57.0ns
N>2 4.8 6.3 7.8 ns
tsk(o) Output Skew; NOTE 2, 3 40 200 ps
tsk(pp) Part-to-Part Skew; NOTE 3, 4 60 600 ps
tsk(b) Bank Skew: NOTE 3, 5 20 85 ps
t
R
/ t
F
OutputRise/Fall Time 20% to 80% 0.4 1 2.5 ns
odc Output Duty Cycle
N=1 35 55 %
N>1 40 60 %
t
EN
Output Enable Time; NOTE 6 5ns
t
DIS
Output Disable Time; NOTE 6 5ns
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
OUT
Output Frequency 250 MHz
t
PD
Propgation Delay, NOTE 1
N24.05.06.0ns
N>2 4.5 6.0 7.5 ns
tsk(o) Output Skew; NOTE 2, 3 40 200 ps
tsk(pp) Part-to-Part Skew; NOTE 3, 4 50 350 ps
tsk(b) Bank Skew: NOTE 3, 5 20 85 ps
t
R
/ t
F
OutputRise/Fall Time; NOTE 6 20% to 80% 400 900 1200 ps
odc Output Duty Cycle
N=1 35 55 %
N>1 40 60 %
t
EN
Output Enable Time; NOTE 6 5ns
t
DIS
Output Disable Time; NOTE 6 5ns
