Specifications
ZigBit™ 700/800/900 MHz Wireless Modules 3-6
8227C–MCU Wireless–06/09
3.3 Pin Configuration
Figure 3-2. ATZB-900-B0 Pinout
Table 3-6. Pin descriptions
Connector
Pin Pin Name Description I/O
Default
State after
Power on
1 SPI_CLK Reserved for stack operation
(4)
O
2 SPI_MISO Reserved for stack operation
(4)
I/O
3 SPI_MOSI Reserved for stack operation
(4)
I/O
4 GPIO0 General Purpose digital Input/Output 0
(2)(3)(4)(7)
I/O tri-state
5 GPIO1 General Purpose digital Input/Output 1
(2)(3)(4)(7)
I/O tri-state
6 GPIO2 General Purpose digital Input/Output 2
(2)(3)(4)(7)
I/O tri-state
7 OSC32K_OUT 32.768 kHz clock output
(4)(5)
O
8 RESET Reset input (active low)
(4)
9,22,23 DGND Digital Ground
10 CPU_CLK
RF clock output. When module is in active state,
4 MHz signal is present on this line. While module
is in the sleeping state, clock generation is also
stopped
(4)
.
O
11 I2C_CLK I
2
C serial clock output
(2)(3)(4)(7)
O tri-state
12 I2C_DATA I
2
C serial clock input/output
(2)(3)(4)(7)
I/O tri-state
13 UART_TXD UART transmit output
(1)(2)(3)(4)(7)
O tri-state
14 UART_RXD UART receive input
(1)(2)(3)(4)(7)
I tri-state
15 UART_RTS
RTS input (Request To send) for UART hardware
flow control. Active low
(2)(3)(4)(7)
I tri-state
Specifications
ZigBit™ 700/800/900 MHz Wireless Modules 3-7
8227C–MCU Wireless–06/09
Notes: 1. The UART_TXD pin is intended for input (i.e. its designation as "TXD" implies some complex system
containing ZigBit 900 as its RF terminal unit), while UART_RXD pin, vice versa, is for output.
2. Most of pins can be configured for general purpose I/O or for some alternate functions as described in
details in the ATmega1281V Datasheet [1].
3. GPIO pins can be programmed either for output, or for input with/without pull-up resistors. Output pin
drivers are strong enough to drive LED displays directly (refer to figures on pages 387-388, [1]).
4. All digital pins are provided with protection diodes to D_VCC and DGND
16 UART_CTS
CTS output (Clear To send) for UART hardware
flow control. Active low
(2)(3)(4)(7)
O tri-state
17 GPIO6 General Purpose digital Input/Output 6
(2)(3)(4)(7)
I/O tri-state
18 GPIO7 General Purpose digital Input/Output 7
(2)(3)(4)(7)
I/O tri-state
19 GPIO3 General Purpose digital Input/Output 3
(2)(3)(4)(7)
I/O tri-state
20 GPIO4 General Purpose digital Input/Output 4
(2)(3)(4)(7)
I/O tri-state
21 GPIO5 General Purpose digital Input/Output 5
(2)(3)(4)(7)
I/O tri-state
24,25 D_VCC Digital Supply Voltage (V
CC
)
(9)
26 JTAG_TMS JTAG Test Mode Select
(2)(3)(4)(6)
I
27 JTAG_TDI JTAG Test Data Input
(2)(3)(4)(6)
I
28 JTAG_TDO JTAG Test Data Output
(2)(3)(4)(6)
O
29 JTAG_TCK JTAG Test Clock
(2)(3)(4)(6)
I
30 ADC_INPUT_3 ADC Input Channel 3
(2)(3)(7)
I tri-state
31 ADC_INPUT_2 ADC Input Channel 2
(2)(3)(7)
I tri-state
32 ADC_INPUT_1 ADC Input Channel 1
(2)(3)(7)
I tri-state
33 BAT
ADC Input Channel 0, used for battery level
measurement. This pin equals V
CC
/3.
(2)(3)(7)
I tri-state
34 A_VREF Input/Output reference voltage for ADC I/O tri-state
35 AGND Analog ground
36 GPIO_1WR 1-wire interface
(2)(3)(4)(7)
I/O
37 UART_DTR
DTR input (Data Terminal Ready) for UART.
Active low
(2)(3)(4)(7)
I tri-state
38 USART0_RXD USART/SPI Receive pin
(2)(3)(4)(7)
I tri-state
39 USART0_TXD USART /SPI Transmit pin
(2)(3)(4)(7)
O tri-state
40 USART0_EXTCLK USART/SPI External Clock
(2)(3)(4)(7)
I/O tri-state
41 GPIO8 General Purpose Digital Input/Output 8
(2)(3)(4)(7)
I/O tri-state
42 IRQ_7 Digital Input Interrupt request 7
(2)(3)(4)(7)
I tri-state
43 IRQ_6 Digital Input Interrupt request 6
(2)(3)(4)(7)
I tri-state
44,46,48 RF GND RF Analog Ground
45 RFP_IO Differential RF Input/Output I/O
47 RFN_IO Differential RF Input/Output I/O
Table 3-6. Pin descriptions (Continued)
Connector
Pin Pin Name Description I/O
Default
State after
Power on
Specifications
ZigBit™ 700/800/900 MHz Wireless Modules 3-8
8227C–MCU Wireless–06/09
5. It is strongly recommended to avoid assigning an alternate function for OSC32K_OUT pin because it is
used by BitCloud. However, this signal can be used if another peripheral or host processor requires
32.768 kHz clock, otherwise this pin can be disconnected.
6. Normally, JTAG_TMS, JTAG_TDI, JTAG_TDO, JTAG_TCK pins are used for on-chip debugging and
flash burning. They can be used for A/D conversion if JTAGEN fuse is disabled.
7. The following pins can be configured with the BitCloud software to be general-purpose I/O lines:
GPIO0, GPIO1, GPIO2, GPIO3, GPIO4, GPIO5, GPIO6, GPIO7, GPIO8, GPIO_1WR, I2C_CLK,
I2C_DATA, UART_TXD, UART_RXD, UART_RTS, UART_CTS, ADC_INPUT_3, ADC_INPUT_2,
ADC_INPUT_1, BAT, UART_DTR, USART0_RXD, USART0_TXD, USART0_EXTCLK, IRQ_7, IRQ_6.
Additionally, four JTAG lines can be programmed with software as GPIO as well, but this requires
changing the fuse bits and will disable JTAG debugging.
8. With BitCloud, CTS pin can be configured to indicate sleep/active condition of the module thus provid-
ing mechanism for power management of host processor. If this function is necessary, connection of
this pin to external pull-down resistor is recommended to prevent the undesirable transients during
module reset process.
9. Using ferrite bead and 1 µF capacitor located closely to the power supply pin is recommended, as
shown below.
10. In SPI mode, USART0_EXTCLK is output. In USART mode, this pin can be configured as either input or
output pin.

ATZB-900-B0

Mfr. #:
Manufacturer:
Description:
RF TXRX MODULE 802.15.4 RP-SMA
Lifecycle:
New from this manufacturer.
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