Specifications
ZigBit™ 700/800/900 MHz Wireless Modules 3-7
8227C–MCU Wireless–06/09
Notes: 1. The UART_TXD pin is intended for input (i.e. its designation as "TXD" implies some complex system
containing ZigBit 900 as its RF terminal unit), while UART_RXD pin, vice versa, is for output.
2. Most of pins can be configured for general purpose I/O or for some alternate functions as described in
details in the ATmega1281V Datasheet [1].
3. GPIO pins can be programmed either for output, or for input with/without pull-up resistors. Output pin
drivers are strong enough to drive LED displays directly (refer to figures on pages 387-388, [1]).
4. All digital pins are provided with protection diodes to D_VCC and DGND
16 UART_CTS
CTS output (Clear To send) for UART hardware
flow control. Active low
(2)(3)(4)(7)
O tri-state
17 GPIO6 General Purpose digital Input/Output 6
(2)(3)(4)(7)
I/O tri-state
18 GPIO7 General Purpose digital Input/Output 7
(2)(3)(4)(7)
I/O tri-state
19 GPIO3 General Purpose digital Input/Output 3
(2)(3)(4)(7)
I/O tri-state
20 GPIO4 General Purpose digital Input/Output 4
(2)(3)(4)(7)
I/O tri-state
21 GPIO5 General Purpose digital Input/Output 5
(2)(3)(4)(7)
I/O tri-state
24,25 D_VCC Digital Supply Voltage (V
CC
)
(9)
26 JTAG_TMS JTAG Test Mode Select
(2)(3)(4)(6)
I
27 JTAG_TDI JTAG Test Data Input
(2)(3)(4)(6)
I
28 JTAG_TDO JTAG Test Data Output
(2)(3)(4)(6)
O
29 JTAG_TCK JTAG Test Clock
(2)(3)(4)(6)
I
30 ADC_INPUT_3 ADC Input Channel 3
(2)(3)(7)
I tri-state
31 ADC_INPUT_2 ADC Input Channel 2
(2)(3)(7)
I tri-state
32 ADC_INPUT_1 ADC Input Channel 1
(2)(3)(7)
I tri-state
33 BAT
ADC Input Channel 0, used for battery level
measurement. This pin equals V
CC
/3.
(2)(3)(7)
I tri-state
34 A_VREF Input/Output reference voltage for ADC I/O tri-state
35 AGND Analog ground
36 GPIO_1WR 1-wire interface
(2)(3)(4)(7)
I/O
37 UART_DTR
DTR input (Data Terminal Ready) for UART.
Active low
(2)(3)(4)(7)
I tri-state
38 USART0_RXD USART/SPI Receive pin
(2)(3)(4)(7)
I tri-state
39 USART0_TXD USART /SPI Transmit pin
(2)(3)(4)(7)
O tri-state
40 USART0_EXTCLK USART/SPI External Clock
(2)(3)(4)(7)
I/O tri-state
41 GPIO8 General Purpose Digital Input/Output 8
(2)(3)(4)(7)
I/O tri-state
42 IRQ_7 Digital Input Interrupt request 7
(2)(3)(4)(7)
I tri-state
43 IRQ_6 Digital Input Interrupt request 6
(2)(3)(4)(7)
I tri-state
44,46,48 RF GND RF Analog Ground
45 RFP_IO Differential RF Input/Output I/O
47 RFN_IO Differential RF Input/Output I/O
Table 3-6. Pin descriptions (Continued)
Connector
Pin Pin Name Description I/O
Default
State after
Power on