N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
Pin Configurations
A third method is to hold both LE and OE in the
enabled state. This allows the data bits to directly con-
trol the output channels, and hence, pulse dim the out-
put current. Make sure that the clock frequency does
not exceed the maximum rate at which the device can
change the state of the output channels.
Power Dissipation
The power dissipation (P
D
) of the MAX16824/
MAX16825 is determined from the following equation:
where:
V
IN
= supply voltage
V
INL
= supply voltage to the LED strings
I
IN
= supply current
V
LED_
= total forward voltage for one LED string
I
LED_
= LED current
V
CS_
= 200mV drop across R
CS_
DUTY_ = PWM_ duty cycle
The worst-case power dissipation occurs when the
drop across each internal MOSFET is at its maximum
with all three channels delivering the maximum allow-
able output current. The maximum drop across the
internal MOSFETs is determined by:
V
INL
- V
LED_
- V
CS_
when V
LED_
is at its minimum.
Higher ambient temperature increases the thermal stress
even further due to the reduction in voltage drop across
the LEDs. The MAX16824/MAX16825 thermal specifica-
tions are given according to the JEDEC-51 guidelines.
Good mechanical/thermal design practices must be
applied to help maintain the device junction temperature
below the absolute maximum ratings at all times.
Chip Information
PROCESS: BiCMOS-DMOS
Package Information
For the latest package outline information and land patterns (foot-
prints), go to www.maximintegrated.com/packages
. Note that a
“+”, “#”, or “-” in the package code indicates RoHS status only.
Package drawings may show a different suffix character, but the
drawing pertains to the package regardless of RoHS status.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE NO.
LAND
PATTERN NO.
16 TSSOP-EP U16E+3
21-0108
90-0120
