Expand menu
Hello, Sign in
My Account
0
Cart
Home
Products
Sensors
Semiconductors
Passive Components
Connectors
Power
Electromechanical
Optoelectronics
Circuit Protection
Integrated Circuits - ICs
Main Products
Manufacturers
Blog
Services
About OMO
About Us
Contact Us
Check Stock
RMLV0408EGSB-4S2#HA1
P1-P3
P4-P6
P7-P9
P10-P12
RMLV0408E
Series
R10DS0206EJ0200
Rev.2.00
Page 7 of 10
2016.1.12
Write Cycle (1) (WE# CLOCK, OE#=”H” while writing)
Note 14.
t
WP
is the interval between write start and
write end.
A write starts when both of CS# and WE# become active.
A write is performed during the over
lap of a l
ow CS# and a low WE#.
A write ends when any of CS# or WE# becomes inactiv
e.
15.
t
OHZ
and t
WHZ
are defined as the time when the I/O pins ente
r a high-impedance state and
are
not referred to
the I/O levels.
16.
This parameter is sampled and not 100
% tested.
17.
During this period, I/O pins are in the output st
ate so input signals must
not be applied to the I/O pins.
CS#
A
0~18
t
CW
t
WHZ
OE#
WE#
I/O
0~7
t
DH
t
WC
Valid address
t
WR
t
AW
t
AS
t
WP
t
DW
*14
*15,16
*15,16
t
OHZ
Valid Data
*17
RMLV0408E
Series
R10DS0206EJ0200
Rev.2.00
Page 8 of 10
2016.1.12
Write Cycle (2)
(WE# CLOCK, OE# Lo
w Fixed)
Note 18.
t
WP
is the interval between write start and
write end.
A write starts when both of CS# and WE# become active.
A write is performed during the over
lap of a l
ow CS# and a low WE#.
A write ends when any of CS# or WE# becomes inactiv
e.
19.
t
WH
Z
is defined as the time
when the I/O pins enter a high-impedance
s
tate and are not referred to the I/O
levels.
20.
This parameter is sampled and not 100
% tested.
21.
During this period, I/O pins are in the output st
ate so input signals must
not be applied to the I/O pins.
CS#
A
0~18
t
CW
t
WHZ
OE#
WE#
I/O
0~7
t
DH
t
WC
Valid address
t
WR
t
AW
t
AS
t
WP
t
DW
t
OW
*18
*19,20
Valid Data
V
IL
OE# = “L” level
*21
*21
RMLV0408E
Series
R10DS0206EJ0200
Rev.2.00
Page 9 of 10
2016.1.12
Write Cycle (3) (CS# CLOCK)
Note 22.
t
WP
is the interval between write start and
write end.
A write starts when both of CS# and WE# become active.
A write is performed during the over
lap of a l
ow CS# and a low WE#.
A write ends when any of CS# or WE# becomes inactiv
e.
CS#
A
0~18
t
CW
OE#
WE#
I/O
0~7
t
DH
t
WC
Valid address
t
WR
t
AW
t
AS
t
WP
t
DW
V
IH
OE# = “H” level
*22
Valid Data
P1-P3
P4-P6
P7-P9
P10-P12
RMLV0408EGSB-4S2#HA1
Mfr. #:
Buy RMLV0408EGSB-4S2#HA1
Manufacturer:
Renesas Electronics
Description:
SRAM SRAM 4MB 3V X8 TSOP32 45NS -40TO85C
Lifecycle:
New from this manufacturer.
Delivery:
DHL
FedEx
Ups
TNT
EMS
Payment:
T/T
Paypal
Visa
MoneyGram
Western
Union
Products related to this Datasheet
RMLV0408EGSB-4S2#AA1
RMLV0408EGSA-4S2#AA1
RMLV0408EGSP-4S2#HA0
RMLV0408EGSB-4S2#HA1
RMLV0408EGSA-4S2#KA1