REV. B
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a
50 MHz, 80 dB Demodulating
Logarithmic Amplifier with Limiter Output
AD606
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703 © Analog Devices, Inc., 1999
FEATURES
Logarithmic Amplifier Performance
–75 dBm to +5 dBm Dynamic Range
1.5 nV/Hz Input Noise
Usable to >50 MHz
37.5 mV/dB Voltage Output
On-Chip Low-Pass Output Filter
Limiter Performance
1 dB Output Flatness over 80 dB Range
3 Phase Stability at 10.7 MHz over 80 dB Range
Adjustable Output Amplitude
Low Power
+5 V Single Supply Operation
65 mW Typical Power Consumption
CMOS-Compatible Power-Down to 325 W typ
<5 s Enable/Disable Time
APPLICATIONS
Ultrasound and Sonar Processing
Phase-Stable Limiting Amplifier to 100 MHz
Received Signal Strength Indicator (RSSI)
Wide Range Signal and Power Measurement
PRODUCT DESCRIPTION
The AD606 is a complete, monolithic logarithmic amplifier
using a 9-stage “successive-detection” technique. It provides
both logarithmic and limited outputs. The logarithmic output is
from a three-pole post-demodulation low-pass filter and provides
a loadable output voltage of +0.1 V dc to +4 V dc. The logarith-
mic scaling is such that the output is +0.5 V for a sinusoidal
input of –75 dBm and +3.5 V at an input of +5 dBm; over this
range the logarithmic linearity is typically within ±0.4 dB. All
scaling parameters are proportional to the supply voltage.
The AD606 can operate above and below these limits, with
reduced linearity, to provide as much as 90 dB of conversion
range. A second low-pass filter automatically nulls the input
offset of the first stage down to the submicrovolt level. Adding
external capacitors to both filters allows operation at input fre-
quencies as low as a few hertz.
The AD606’s limiter output provides a hard-limited signal
output as a differential current of ±1.2 mA from open-collector
outputs. In a typical application, both of these outputs are
loaded by 200 resistors to provide a voltage gain of more than
90 dB from the input. Transition times are 1.5 ns, and the
phase is stable to within ±3° at 10.7 MHz for signals from
–75 dBm to +5 dBm.
The logarithmic amplifier operates from a single +5 V supply
and typically consumes 65 mW. It is enabled by a CMOS logic
level voltage input, with a response time of <5 µs. When dis-
abled, the standby power is reduced to <1 mW within 5 µs.
The AD606J is specified for the commercial temperature range
of 0°C to +70°C and is available in 16-lead plastic DIPs or
SOICs. Consult the factory for other packages and temperature
ranges.
FUNCTIONAL BLOCK DIAGRAM
REFERENCE
AND POWER-UP
ONE-POLE
FILTER
FINAL
LIMITER
MAIN SIGNAL PATH
11.15dB/STAGE
OFFSET-NULL
LOW-PASS FILTER
30pF
30pF
360kV
360kV
2pF
9.375kV
9.375kV
2pF
X2
TWO-POLE
SALLEN-KEY
FILTER
12mA/dB
2mA/dB
HIGH-END
DETECTORS
AD606
1.5kV
1.5kV
250V
30kV 30kV
910111213141516
1234567 8
INLO COMM ISUM ILOG BFIN VLOG OPCM LMLO
LMHILADJFIL2FIL1VPOSPRUPCOMMINHI
X1
AD606* PRODUCT PAGE QUICK LINKS
Last Content Update: 02/23/2017
COMPARABLE PARTS
View a parametric search of comparable parts.
DOCUMENTATION
Application Notes
AN-202: An IC Amplifier User’s Guide to Decoupling,
Grounding, and Making Things Go Right for a Change
AN-405: Increasing the Speed of the Output Response of
the AD606
Data Sheet
AD606: 50 MHz, 80 dB Demodulating Logarithmic
Amplifier with Limiter Output Data Sheet
TOOLS AND SIMULATIONS
ADIsimPLL™
ADIsimRF
REFERENCE MATERIALS
Technical Articles
Design a Logamp RF Pulse Detector
Detecting Fast RF Bursts using Log Amps
Log Amps and Directional Couplers Enable VSWR
Detection
Make Precise Base-Station Power Measurements
Measurement and Control of RF Power, Part II
Measuring the RF Power in CDMA2000 and W-CDMA High
Power Amplifiers (HPAs)
Measuring VSWR and Gain in Wireless Systems
DESIGN RESOURCES
AD606 Material Declaration
PCN-PDN Information
Quality And Reliability
Symbols and Footprints
DISCUSSIONS
View all AD606 EngineerZone Discussions.
SAMPLE AND BUY
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TECHNICAL SUPPORT
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number.
DOCUMENT FEEDBACK
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AD606–SPECIFICATIONS
(@ T
A
= +25C and supply = +5 V unless otherwise noted; dBm assumes 50 )
REV. B
–2–
Model AD606J
Parameter Conditions Min Typ Max Units
SIGNAL INPUT
Log Amp f
MAX
AC Coupled; Sinusoidal Input 50 MHz
Limiter f
MAX
AC Coupled; Sinusoidal Input 100 MHz
Dynamic Range 80 dB
Input Resistance Differential Input 500 2,500
Input Capacitance Differential Input 2 pF
SIGNAL OUTPUT
Limiter Flatness –75 dBm to +5 dBm Input Signal at 10.7 MHz –1.5 +1.5 dB
With Pin 9 to V
POS
via a 200 Resistor
and Pin 8 to V
POS
via a 200 Resistor
Output Current At Pins 8 or 9, Proportional to V
POS
, LADJ Grounded 1.2 mA
LADJ Open Circuited 0.48 mA
Phase Variation with Input Level –75 dBm to +5 dBm Input Signal at 10.7 MHz ±3 Degrees
LOG (RSSI) OUTPUT
Nominal Slope At 10.7 MHz; (0.0075 × V
POS
)/dB 37.5 mV/dB
At 45 MHz 35 mV/dB
Slope Accuracy Untrimmed at 10.7 MHz –15 ±5 +15 %
Intercept Sinusoidal Input; Independent of V
POS
–88.33 dBm
Logarithmic Conformance –75 dBm to +5 dBm Input Signal at 10.7 MHz –1.5 0.4 +1.5 dB
Nominal Output Input Level = –75 dBm 0.5 V
Input Level = –35 dBm 2 V
Input Level = +5 dBm 3.5 V
Accuracy over Temperature After Calibration at –35 dBm at 10.7 MHz –3 +3 dB
T
MIN
to T
MAX
Video Response Time From Onset of Input Signal Until Output Reaches 400 ns
95% of Final Value
POWER-DOWN INTERFACE
Power-Up Response Time Time Delay Following HI Transition Until 3.5 µs
Device Meets Full Specifications
AC Coupled with 100 pF Coupling Capacitors
Input Bias Current Logical HI Input (See Figure 12) 1 nA
Logical LO Input 4 µA
POWER SUPPLY
Operating Range 4.5 5.5 V
Powered-Up Current Zero Signal Input 13 mA
T
MIN
to T
MAX
13 20 mA
Powered-Down Current T
MIN
to T
MAX
65 200 µA
Specifications subject to change without notice.

AD606JRZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Logarithmic Amplifiers 50 MHz 80dB DEMODULATING AMP
Lifecycle:
New from this manufacturer.
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