74AC109, 74ACT109 Dual JK Positive Edge-Triggered Flip-Flop
©1988 Fairchild Semiconductor Corporation www.fairchildsemi.com
74AC109, 74ACT109 Rev. 1.5 7
AC Electrical Characteristics for ACT
Note:
8. Voltage range 5.0 is 5.0V ± 0.5V
AC Operating Requirements for ACT
Note:
9. Voltage range 5.0 is 5.0V ± 0.5V
Capacitance
Symbol Parameter V
CC
(V)
(8)
T
A
= +25°C,
C
L
= 50pF
T
A
= –40°C to +85°C,
C
L
= 50pF
UnitsMin. Typ. Max. Min. Max.
f
MAX
Maximum Clock Frequency 5.0 145 210 125 MHz
t
PLH
Propagation Delay,
CP
n
to Q
n
or Q
n
5.0 4.0 7.0 11.0 3.5 13.0 ns
t
PHL
Propagation Delay,
CP
n
to Q
n
or Q
n
5.0 3.0 6.0 10.0 2.5 11.5 ns
t
PLH
Propagation Delay,
C
Dn
or S
Dn
to Q
n
or Q
n
5.0 2.5 5.5 9.5 2.0 10.5 ns
t
PHL
Propagation Delay 5.0 2.5 6.0 10.0 2.0 11.5 ns
C
Dn
or S
Dn
to Q
n
or Q
n
Symbol Parameter V
CC
(V)
(9)
T
A
= +25°C,
C
L
= 50pF
T
A
= –40°C to +85°C,
C
L
= 50pF
UnitsTyp. Guaranteed Minimum
t
S
Setup Time, HIGH or LOW,
J
n
or K
n
to CP
n
5.0 0.5 2.0 2.5 ns
t
H
Hold Time, HIGH or LOW,
J
n
or K
n
to CP
n
5.0 0 2.0 2.0 ns
t
W
Pulse Width,
CP
n
or C
Dn
or S
Dn
5.0 3.0 5.0 6.0 ns
t
rec
Recovery Time,
C
Dn
or S
Dn
to CP
n
5.0 –2.5 0 0 ns
Symbol Parameter Conditions Typ. Units
C
IN
Input Capacitance V
CC
= OPEN 4.5 pF
C
PD
Power Dissipation Capacitance V
CC
= 5.0V 35.0 pF
