MAX1638
High-Speed Step-Down Controller with
Synchronous Rectification for CPU Power
14 ______________________________________________________________________________________
Use I
PEAK
from the equation in the section Specifying
the Inductor.
The high inductance of standard wire-wound resistors
can degrade performance. Low-inductance resistors,
such as surface-mount power metal-strip resistors, are
preferred. The current-sense resistor’s power rating
should be higher than the following:
In high-current applications, connect several resistors
in parallel as necessary to obtain the desired resis-
tance and power rating.
Selecting the Output Filter Capacitor
Output filter capacitor values are generally determined
by effective series resistance (ESR) and voltage-
rating requirements, rather than by the actual capaci-
tance value required for loop stability. Due to the high
switching currents and demanding regulation require-
ments in a typical MAX1638 application, use only spe-
cialized low-ESR capacitors intended for switching-
regulator applications, such as Kemet T510, AVX TPS,
Sprague 595D, Sanyo OS-CON, or Sanyo GX series. Do
not use standard aluminum-electrolytic capacitors,
which can cause high output ripple and instability due
to high ESR. The output voltage ripple is usually domi-
nated by the filter capacitor’s ESR, and can be
approximated as I
RIPPLE
x R
ESR
. To ensure stability, the
capacitor must meet both minimum capacitance and
maximum ESR values as given in the following equations:
Compensating the Feedback Loop
The feedback loop needs proper compensation to pre-
vent excessive output ripple and poor efficiency
caused by instability. Compensation cancels unwanted
poles and zeros in the DC-DC converter’s transfer func-
tion that are due to the power-switching and filter ele-
ments with corresponding zeros and poles in the
feedback network. These compensation zeros and
poles are set by the compensation components CC1,
CC2, and RC1. The objective of compensation is to
ensure stability by ensuring that the DC-DC converter’s
phase shift is less than 180° by a safe margin, at the
frequency where the loop gain falls below unity.
Canceling the Sampling Pole
and Output Filter ESR Zero
Compensate the fast-voltage feedback loop by con-
necting a resistor and a capacitor in series from the
CC1 pin to AGND. The pole from CC1 can be set to
cancel the zero from the filter-capacitor ESR. Thus the
capacitor at CC1 should be as follows:
Resistor RC1 sets a zero that can be used to compen-
sate for the sampling pole generated by the switching
frequency. Set RC1 to the following:
The CC1 pin’s output resistance is 10kΩ.
Setting the Dominant Pole
and Canceling the Load and Output Filter Pole
Compensate the slow-voltage feedback loop by adding
a ceramic capacitor from the CC2 pin to AGND. This is
an integrator loop used to cancel out the DC load-
regulation error. Selection of capacitor CC2 sets the
dominant pole and a compensation zero. The zero is
typically used to cancel the unwanted pole generated
by the load and output filter capacitor at the maximum
load current. Select CC2 to place the zero close to or
slightly lower than the frequency of the unwanted pole,
as follows:
The transconductance of the integrator amplifier at CC2
is 1mmho. The voltage swing at CC2 is internally
clamped around 2.4V to 3V minimum and 4V to V
CC
maximum to improve transient response times. CC2
can source and sink up to 100µA.
Choosing the MOSFET Switches
The two high-current N-channel MOSFETs must be
logic-level types with guaranteed on-resistance specifi-
cations at V
GS
= 4.5V. Lower gate-threshold specs are
better (i.e., 2V max rather than 3V max). Gate charge
