NCV8800 Series
http://onsemi.com
9
CIRCUIT DESCRIPTION
ENABLE
The NCV8800 remains in sleep mode drawing less than
25 μA of quiescent current until the ENABLE pin is brought
high powering up the device. There are two options
available for the ENABLE feature.
• Option 1 (Sequenced). The output voltage tracks the
ENABLE pin with a maximum delta voltage between
them (reference the Output Tracking specs in the
Electrical Characteristics). This allows the device to be
used with microprocessors requiring dual supply
voltages. One voltage is typically needed to power the
core of the microprocessor, and another high voltage is
needed to power the microprocessor I/O.
• Option 2 (High Voltage). This option removes the
sequencing feature above, and allows the device to be
controlled up to the battery voltage on the ENABLE
pin with an external resistor (10 k ). See Figure 5.
Figure 5. Switched Battery Application
ENABLE
V
IN
V
BAT
10 k
AUXILIARY
The AUXILIARY pin provides an alternate path for the IC
to maintain operation. The AUXILIARY pin is diode OR’d
with the V
IN
pin to the control circuitry (the DMOS output
drivers are not included). If the voltage (V
IN
) from the
battery dips as low as 3.5 V during a crank condition, the
NCV8800 will maintain operation through a 6.0 V(min)
connection on the AUXILIARY pin. Using this feature is
optional. This pin should be grounded when not in use.
V
IN
Normal supply voltage input. An external diode must be
provided to afford reverse battery protection.
SWITCH
DMOS output drivers with 0.75 Ω max push/pull
capability. Non--overlap logic is provided to guarantee shoot
through current is minimized.
RESET
The RESET is an open drain output which goes low when
the feedback voltage on FB1 and FB2 goes below the
undervoltage RESET
threshold. The output also goes low
when the voltage on FB1 and FB2 exceeds the overvoltage
RESET
threshold. The RESET output is an open drain
output capable of sinking 1.6 mA.
FB1 and FB2
FB1 and FB2 are the feedback pins to the error amplifier,
which control the output SWITCH as needed to the
regulated output. They are internally wire bonded to the
same electrical connection providing double protection for
an open circuit which would cause the buck regulator to rise
above its desired output reaching the voltage on V
IN
.These
pins also provide the feedback path for the RESET
function.
DELAY
There are two options for the delay time for the RESET to go
low. Connecting the pin to GND will provide a minimum of 14
ms. Connecting the pin to FB1 and FB2 will provide a
minimum of 28 ms. Absolute max voltage on the DELAY
pin is 7.0 V. Use a resistor divider to run off higher voltages.
The 7.5 V option will require this divider (see Figure 6).
Figure 6.
DELAY
(7.0 V max)
V
OUT
COMP
The COMP pin provides access to the error amplifiers
output. Switching power supplies work as feedback control
systems, and require compensation for stability. A 1.0 k
resistor and 0.1 μF capacitor work well in the application in
Figure 2.
CP
The on--chip DMOS drivers require the gates of the
devices to be pulled above their drain voltage. An external
capacitor located between the SWITCH output, and the CP
pin provides the charge pump action to drive the gate of the
high --side driver high enough to turn the device on.
