6.42
4
IDT71V3556, IDT71V3558, 128K x 36, 256K x 18, 3.3V Synchronous SRAMS with
ZBT
Feature, 3.3V I/O, Burst Counter, and Pipelined Outputs Commercial and Industrial Temperature Ranges
Recommended DC Operating
Conditions
NOTES:
1. VIL (min.) = –1.0V for pulse width less than tCYC/2, once per cycle.
2. VIH (max.) = +6.0V for pulse width less than tCYC/2, once per cycle.
Symbol Parameter Min. Typ. Max. Unit
V
DD
Core Supply Voltage 3.135 3.3 3.465 V
V
DDQ
I/O Supply Voltage 3.135 3.3 3.465 V
V
SS
Supply Voltage 0 0 0 V
V
IH
Input High Voltage - Inputs 2.0
____
V
DD
+0.3 V
V
IH
Input High Voltage - I/O 2.0
____
V
DDQ
+0.3
(2)
V
V
IL
Input Low Voltage -0.3
(1 )
____
0.8 V
5281 tbl 04
Functional Block Diagram
6.42
IDT71V3556, IDT71V3558, 128K x 36, 256K x 18, 3.3V Synchronous SRAMS with
ZBT
Feature, 3.3V I/O, Burst Counter, and Pipelined Outputs Commercial and Industrial Temperature Ranges
5
Recommended Operating
Temperature and Supply Voltage
Pin Configuration - 128K x 36
NOTES:
1. Pins 14, 16 and 66 do not have to be connected directly to VDD as long as the input voltage is VIH.
2. Pins 83 and 84 are reserved for future 8M and 16M respectively.
3. Pin 64 does not have to be connected directly to VSS as long as the input voltage is VIL; on the latest die revision this pin
supports ZZ (sleep mode).
Top View
100
TQFP
10099989796959493929190 8786858483828189 88
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
A
6
A
7
C
E
1
C
E
2
B
W
4
B
W
3
B
W
2
B
W
1
C
E
2
V
D
D
V
S
S
C
L
K
R
/
W
C
E
N
O
E
A
D
V
/
L
D
N
C
(
2
)
N
C
(
2
)
A
8
A
9
31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
L
B
O
A
1
4
A
1
3
A
1
2
A
1
1
A
1
0
V
D
D
V
S
S
A
0
A
1
A
2
A
3
A
4
A
5
I/O
31
I/O
30
V
DDQ
V
SS
I/O
29
I/O
28
I/O
27
I/O
26
V
SS
V
DDQ
I/O
25
I/O
24
V
SS
V
DD
I/O
23
I/O
22
V
DDQ
V
SS
I/O
21
I/O
20
I/O
19
I/O
18
V
SS
V
DDQ
I/O
17
I/O
16
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
I/O
14
V
DDQ
V
SS
I/O
13
I/O
12
I/O
11
I/O
10
V
SS
V
DDQ
I/O
9
I/O
8
V
SS
V
DD
I/O
7
I/O
6
V
DDQ
V
SS
I/O
5
I/O
4
I/O
3
I/O
2
V
SS
V
DDQ
I/O
1
I/O
0
5281 drw 02
V
DD
(1)
I/O
15
I/O
P3
V
DD
(1)
I/O
P4
A
1
5
A
1
6
I/O
P1
V
DD
(1)
I/O
P2
V
SS
/ZZ
(3)
,
N
C
N
C
N
C
N
C
Grade Temperature
(1)
V
SS
V
DD
V
DDQ
Commercial 0°C to +70°C 0V 3.3V±5% 3.3V±5%
Industrial -40°C to +85°C 0V 3.3V±5% 3.3V±5%
5281 tbl 05
NOTES:
1. T
A is the "instant on" case temperature.
6.42
6
IDT71V3556, IDT71V3558, 128K x 36, 256K x 18, 3.3V Synchronous SRAMS with
ZBT
Feature, 3.3V I/O, Burst Counter, and Pipelined Outputs Commercial and Industrial Temperature Ranges
Absolute Maximum Ratings
(1)
Pin Configuration - 256K x 18
100 Pin TQFP Capacitance
(1)
(TA = +25° C, f = 1.0MHz)
NOTES:
1. Pins 14, 16 and 66 do not have to be connected directly to VDD as long as the
input voltage is VIH.
2. Pins 83 and 84 are reserved for future 8M and 16M respectively.
3. Pin 64 does not have to be connected directly to VSS as long as the input
voltage is VIL; on the latest die revision this pin supports ZZ (sleep mode).
Top View
100 TQFP
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
2. VDD terminals only.
3. VDDQ terminals only.
4. Input terminals only.
5. I/O terminals only.
6. This is a steady-state DC parameter that applies after the power supply has
reached its nominal operating value. Power sequencing is not necessary; however,
the voltage on any input or I/O pin cannot exceed VDDQ during power supply ramp
up.
7. TA is the "instant on" case temperature.
NOTE:
1. This parameter is guaranteed by device characterization, but not production tested.
Symbol Rating
Commercial &
Industrial Values
Unit
V
TERM
(2)
Terminal Voltage with
Respect to GND
-0.5 to +4.6 V
V
TERM
(3,6)
Terminal Voltage with
Respect to GND
-0.5 to V
DD
V
V
TERM
(4,6)
Terminal Voltage with
Respect to GND
-0.5 to V
DD
+0.5 V
V
TERM
(5,6)
Terminal Voltage with
Respect to GND
-0.5 to V
DDQ
+0.5 V
T
A
(7)
Commercial
Operating Temperature
-0 to +70
o
C
Industrial
Operating Temperature
-40 to +85
o
C
T
BIAS
Tem p er a t u r e
Under Bias
-55 to +125
o
C
T
STG
Storage
Tem p er a t u r e
-55 to +125
o
C
P
T
Power Dissipation 2.0 W
I
OUT
DC Output Current 50 mA
5281 tbl 06
10099989796959493929190 8786858483828189 88
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
A
6
A
7
C
E
1
C
E
2
N
C
N
C
B
W
2
B
W
1
C
E
2
V
D
D
V
S
S
C
L
K
R
/
W
C
E
N
O
E
A
D
V
/
L
D
N
C
(
2
)
N
C
(
2
)
A
8
A
9
31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
L
B
O
A
1
5
A
1
4
A
1
3
A
1
2
A
1
1
V
D
D
V
S
S
A
0
A
1
A
2
A
3
A
4
A
5
NC
NC
V
DDQ
V
SS
NC
I/O
P2
I/O
15
I/O
14
V
SS
V
DDQ
I/O
13
I/O
12
V
SS
V
DD
I/O
11
I/O
10
V
DDQ
V
SS
I/O
9
I/O
8
NC
NC
V
SS
V
DDQ
NC
NC
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
NC
V
DDQ
V
SS
NC
I/O
P1
I/O
7
I/O
6
V
SS
V
DDQ
I/O
5
I/O
4
V
SS
V
DD
I/O
3
I/O
2
V
DDQ
V
SS
I/O
1
I/O
0
NC
NC
V
SS
V
DDQ
NC
NC
5281 drw 02a
V
DD
(1)
NC
NC
V
DD
(1)
NC
A
1
6
A
1
7
NC
V
DD
(1)
A
10
V
SS
/ZZ
(3)
,
N
C
N
C
N
C
N
C
Symbol Parameter
(1 )
Conditions Max. Unit
C
IN
Input Capacitance V
IN
= 3dV 5 pF
C
I/O
I/O Capacitance V
OUT
= 3dV 7 pF
5281 tbl 07
119 BGA Capacitance
(1)
(TA = +25° C, f = 1.0MHz)
Symbol Parameter
(1)
Conditions Max. Unit
C
IN
Input Capacitance V
IN
= 3dV 7 pF
C
I/O
I/O Capacitance V
OUT
= 3dV 7 pF
5281 tbl 07a
165 fBGA Capacitance
(1)
(TA = +25° C, f = 1.0MHz)
Symbol Parameter
(1)
Conditions Max. Unit
C
IN
Input Capacitance V
IN
= 3dV TBD pF
C
I/O
I/O Capacitance V
OUT
= 3dV TBD pF
5281 tbl 07b

71V3556SA133BQ

Mfr. #:
Manufacturer:
IDT
Description:
SRAM 4M X36 3.3V I/O SLOW ZBT
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union