L9857 Electrical specifications
Doc ID 12896 Rev 3 7/11
2.5 Reset functional diagram
The diagram is guaranteed for the following condition.
V
CC
= 10 V; V
BS
= 10 V @ -40 °C, V
CC
= 17 V; V
BS
= 17 V @ +25 °C and 125 °C
Figure 3. Reset functional diagram
t
phl
Input-to-output turn-off propogation
delay (50 % input level to 90%
output level)
--0.10.2
Ps
tphl_res
RES-to-output turn-off propogation
delay (50% input level to 90%
output levels)
--0.10.3
tplh_res
RES-to-output turn-on propogation
delay (50% input level to 10%
output levels)
--0.10.8
Input characteristics
V
INH
High logic level input threshold - 9.5 - -
V
V
INL
Low logic level input threshold - - - 6
R
IN
High logic level input resistance
(Pull-down resistor)
-60-300k:
I
IN
Low logic level input current V
IN
= 0 - - 5 PA
V
H_RES
High logic level RES input threshold
Reset signal comes from a
5 V system!
3.5 - -
V
V
L_RES
Low Logic Level RES input
threshold
R eset signal comes from a
5V system!
--1.4
R
RES
High logic level RES input
resistance (Pull-down resistor)
Reset signal comes from a
5 V system with pull-up
resistor 3.8 k: to 5 V.
(1)
60 - 300 k:
I
RES
Low logic level input current V
RES
= 0 - - 5 PA
1. 4 HS-driver reset- inputs and other IC with their input pull-down resistors are connected in parallel with the RESET wire.
The enable input RES- is an active low input, that means a logic low turns the external Power MOSFET off. The input
circuitry has to make sure, that the MOSFET is off, when the pin is open or floating. In the application the RES- pin is tied to
a bipolar open collector transistor or MOSFET open drain transistor with pull-up resistor 3.8K to +5V together with other
RES- inputs of other IC.
Table 6. Electrical characteristics (continued)
Symbol Parameter Test condition Min. Typ. Max. Unit
IN
RESET -
HO-VS: -40°C
HO-VS: 25°C
HO-VS: 125°C
