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AD7403TRIZ-EP

P1-P3P4-P6P7-P9P10-P12
16-Bit, Isolated Sigma-Delta Modulator
Enhanced Product
AD7403-EP
Rev. 0 Document Feedback
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responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
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Tel: 781.329.4700 ©2016 Analog Devices, Inc. All rights reserved.
Technical Support www.analog.com
FEATURES
5 MHz to 16 MHz external clock input rate
16 bits, no missing codes
Signal-to-noise ratio (SNR): 88 dB typical
Effective number of bits (ENOB): 14.2 bits typical
Offset drift vs. temperature: 1.6 µV/°C typical
On-board digital isolator
On-board reference
Full-scale analog input range: ±320 mV
High common-mode transient immunity: >25 kV/µs
Wide-body SOIC with increased creepage package
Slew rate limited output for low EMI
Safety and regulatory approvals
UL recognition
5000 V rms for 1 minute per UL 1577
CSA Component Acceptance Notice 5A
VDE Certificate of Conformity
DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
V
IORM
= 1250 V
PEAK
ENHANCED PRODUCT FEATURES
Defense and aerospace applications (AQEC standard)
Military temperature range: −55°C to +125°C
Controlled manufacturing baseline
One assembly/test site
One fabrication site
Enhanced product change notification
Qualification data available on request
APPLICATIONS
Shunt current monitoring
AC motor controls
Power and solar inverters
Wind turbine inverters
Data acquisition systems
Analog-to-digital and optoisolator replacements
GENERAL DESCRIPTION
The AD7403-EP
1
is a high performance, second-order, Σ-Δ
modulator that converts an analog input signal into a high
speed, single-bit data stream, with on-chip digital isolation
based on Analog Devices, Inc., iCoupler® technology. The
device operates from a 5 V (V
DD1
) power supply and accepts a
differential input signal of ±250 mV (±320 mV full-scale). The
differential input is ideally suited to shunt voltage monitoring in
high voltage applications where galvanic isolation is required.
FUNCTIONAL BLOCK DIAGRAM
V
DD1
V
DD2
AD7403-EP
BUF
REF
CLK
DECODER
GND
1
GND
2
MDAT
MCLKIN
(5MHz
TO 16MHz)
V
IN+
V
IN–
CLK
ENCODER
DATA
ENCODER
DATA
DECODER
Σ-Δ ADC
13395-001
Figure 1.
The analog input is continuously sampled by a high performance
analog modulator, and converted to a ones density digital output
stream with a data rate of up to 16 MHz. The original
information can be reconstructed with an appropriate digital
filter to achieve 88 dB signal to noise ratio (SNR) at 78.1 kSPS.
The serial interface is digitally isolated. High speed complementary
metal oxide semiconductor (CMOS) technology, combined with
monolithic transformer technology, means the on-chip isolation
provides outstanding performance characteristics, superior to
alternatives such as optocoupler devices. The AD7403-EP
device is offered in a 16-lead, wide-body SOIC package and has
an operating temperature range of −55°C to +125°C.
Additional application and technical information can be found
in the AD7403 data sheet.
1
Protected by U.S. Patents 5,952,849; 6,873,065; and 7,075,329.
AD7403-EP Enhanced Product
Rev. 0 | Page 2 of 12
TABLE OF CONTENTS
Features .............................................................................................. 1
Enhanced Product Features ............................................................ 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Timing Specifications .................................................................. 4
Package Characteristics ............................................................... 5
Insulation and Safety Related Specifications ............................ 5
Regulatory Information ............................................................... 5
DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 Insulation
Characteristics ...............................................................................6
Absolute Maximum Ratings ............................................................7
ESD Caution...................................................................................7
Pin Configurations and Function Descriptions ............................8
Typical Performance Characteristics ..............................................9
Outline Dimensions ....................................................................... 12
Ordering Guide .......................................................................... 12
REVISION HISTORY
4/16—Revision 0: Initial Version
Enhanced Product AD7403-EP
Rev. 0 | Page 3 of 12
SPECIFICATIONS
V
DD1
= 4.5 V to 5.5 V, V
DD2
= 4.5 V to 5.5 V, V
IN+
= −250 mV to +250 mV, V
IN−
= 0 V, T
A
= −55°C to +125°C, f
MCLKIN
= 5 MHz to 16 MHz, tested
with sinc3 filter, 256 decimation rate, as defined by Verilog code, unless otherwise noted. All voltages are relative to their respective ground.
Table 1.
Parameter Min Typ Max Unit Test Conditions/Comments
STATIC PERFORMANCE
Resolution
16 Bits Filter output truncated to 16 bits
Integral Nonlinearity (INL)
1
±2 ±12 LSB
Differential Nonlinearity (DNL)
1
±0.99 LSB Guaranteed no missed codes to 16 bits
Offset Error
1
±0.2 ±0.9 mV
Offset Drift vs. Temperature
2
1.6
µV/°C
1.3 3.1 µV/°C 0°C to 85°C
Offset Drift vs. V
DD1
2
50 µV/V
Gain Error
1
±0.2 ±0.95 % FSR
Gain Error Drift vs. Temperature
2
65 95 ppm/°C
40 60 µV/°C
Gain Error Drift vs. V
DD1
2
±0.6 mV/V
ANALOG INPUT
Input Voltage Range −320 +320 mV Full-scale range
−250
mV
For specified performance
Input Common-Mode Voltage Range −200 to +300 mV
Dynamic Input Current ±45 ±50 µA V
IN+
= ±250 mV, V
IN−
= 0 V
0.05 µA V
IN+
= 0 V, V
IN−
= 0 V
DC Leakage Current ±0.01 ±0.6 µA
Input Capacitance
14
pF
DYNAMIC SPECIFICATIONS
1
V
IN+
= 1 kHz
Signal-to-Noise-and-Distortion Ratio (SINAD) 82 87 dB
Signal-to-Noise Ratio (SNR) 86 88 dB
Total Harmonic Distortion (THD) −94 dB
Peak Harmonic or Spurious Noise (SFDR)
−95 dB
Effective Number of Bits (ENOB) 13.1 14.2 Bits
Noise Free Code Resolution
14 Bits
ISOLATION TRANSIENT IMMUNITY
1
25 30 kV/µs
LOGIC INPUTS
CMOS with Schmitt trigger
Input Voltage
High (V
IH
) 0.8 × V
DD2
V
Low (V
IL
) 0.2 × V
DD2
V
Input Current (I
IN
) ±0.6 µA
Input Capacitance (C
IN
) 10 pF
LOGIC OUTPUTS
Output Voltage
High (V
OH
)
V
DD2
− 0.1
V
I
O
= −200 µA
Low (V
OL
) 0.4 V I
O
= 200 µA
POWER REQUIREMENTS
V
DD1
4.5
V
V
DD2
4.5 5.5 V
I
DD1
30 36 mA V
DD1
= 5.5 V
I
DD2
12 18 mA V
DD2
= 5.5 V
Power Dissipation 231 297 mW V
DD1
= V
DD2
= 5.5 V
1
See the Terminology section of the AD7403 datasheet.
2
Not production tested. Sample tested during initial release to ensure compliance.
P1-P3P4-P6P7-P9P10-P12

AD7403TRIZ-EP

Mfr. #:
Buy AD7403TRIZ-EP
Manufacturer:
Analog Devices Inc.
Description:
Data Acquisition ADCs/DACs - Specialized Isolated 16Bit SigmaDeltaADCExtClk
Lifecycle:
New from this manufacturer.
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