AS2702-20 Datasheet AS2702-20T, AS2702-16T, AS2702-20 | P4-P6

AS2702 – AS-Interface Slave IC

Revision 1.3, 21-Aug-08 Page 4 of 13

0.5

100

t/ °C

Pv/ W

0.5

50 100

t/ °C

Pv/ W

SOIC20SOIC16

Figure 2 Max. acceptable power dissipation relative to ambient temperature

Recommended Operating Conditions

Symbol Parameter Min Nom Max Unit Note

VLTGP Positive supply voltage/dc portion 22.5 34 V 1

ILTG Supply current consumption 6 mA 2

OA Ambient temperature - 25 25 85 °C 3

FC Quartz frequency 5.333333 MHz 4

Sensitivity against moisture 5

Notes:

1 False-poling protection diode to be inserted between pos. AS-Interface bus line and LTGP-pin. LTGP-pin to be protected

furthermore with a voltage clamp between LTGP and LTGN.

2 Oscillator on; data transmission stage off; no loads connected

3 Power dissipation restrictions as per Figure 2 to be observed

4 AS-Interface Quartz

5 Level 5 acc. to JEDEC-standard JESD22-A112

Supply Pin LTGP

Positive supply pin connected to positive AS-Interface bus line and clamped relative to neg. supply pin/ground LTGN as described

under Recommended Operating Conditions.

VLTGP and ILTG specified under Recommended Operating Conditions as well.

Symbol Parameter Min Nom Max Unit Note

VSIG VPP of sin2-data-pulses on top of dc supply voltage 3 8 V

Z Input impedance between 50kHz and 300kHz 40 pF CCDC = 100nF

18 kOhm

50 mH

AS2702 – AS-Interface Slave IC

Revision 1.3, 21-Aug-08 Page 5 of 13

Buffer Pin CDC

An external buffer capacitor with a recommended value of 100nF should be connected to this pin to ensure a sufficiently high input

impedance Z at power supply pin LTGP.

Voltage at this pin can be as high as VLTGP.

Nom. 24V Power Supply Output UOUT

The supply output voltage at UOUT is directly derived from VLTGP and regulated to a level with an offset of about -6V relative to

VLTGP.

UOUT provides bias to the sensors and actuators circuitry connected to the slave device as well as to the LEDs connected to

outputs LED1 and LED2.

UOUT is equipped with a thermal overload protection, which foresees that VUOUT is switched off as soon as the slave device’s

substrate temperature TJ passes a threshold value in the range of (155 ±20)°C.

After TJ has come down and has passed a temperature threshold about (15 ±5)°C lower than (155 ±20)°C and after a consecutive

minimum delay time of 1s has elapsed, VUOUT is switched on again.

Symbol Parameter Min Max Unit Note

VUOUT Power supply output voltage VLTGP - 6.3V VLTGP - 5.3V V

IUOUT Load current 50 mA 1

VCOMOFF UOUT voltage level 9.5 10.5 V

below which data transmission is inhibited

CUOUT Buffer capacitor 10 µF 2

Notes:

1 In case IUOUT >40mA and presence of sin2-data pulses on LTGP with VSIG >3V, VUOUT may drop as much as 1V below it’s

level in unloaded condition

2 Electrolytic and rf filter capacitor in parallel

Nom. 5V Power Supply Output U5R

The voltage at U5R is derived from the voltage present at UOUT, as long as UOUT is not switched off due to overload. In the latter

case U5R is derived from an alternative voltage out of the UOUT voltage regulator, which is more or less similar to VUOUT in non

switched off condition of UOUT. As a result VU5R is not affected by overload condition at UOUT and will remain.

Symbol Parameter Min Max Unit

VU5R Power supply output voltage 4.85 5.15 V

IU5R Load current 1 mA

CU5R Buffer capacitor 470 nF

Oscillator Pins OSC1 and OSC2

The only component to be connected to these pins is a quartz crystal with a resonance frequency of 5.333333 MHz (AS-Interface

quartz crystal).

Symbol Parameter Min Max Unit

CX2 Stray capacitance 10 pF

AS2702 – AS-Interface Slave IC

Revision 1.3, 21-Aug-08 Page 6 of 13

Data Port Pins D3, …, D0 and Data Strobe Pin DSTBn

Basically data port D3, …, D0 is designed for bidirectional data transfer out of and into the slave device. Each data port pin is

equipped with both a low-side open-drain output stage as well as an input stage to this purpose.

Depending on the so-called IO-configuration code, written and stored in the slave device, each data port pin is individually set to

behave as

• output, or

• output/input, or

• input.

The timing of the data transfer is presented in Figure 3.

Strobe signal DSTBn flags and governs the data transfer as follows:

a) data port pin is set ‘output’:

output data become valid upon the HL-edge of the strobe and will remain so until the next HL-edge, hence during the entire

strobe cycle;

b) data port pin is set ‘output/input’:

output data become valid upon the HL-edge of the strobe and will remain so until it’s LH-edge; input data to be valid within a

specific time window relative to the HL-edge, after completion of the strobe’s L-phase;

c) data port pin is set ‘input’:

input data to be valid within a specific time window relative to the HL-edge of the strobe, after completion of the strobe’s

L-phase.

If necessary, output data as per a) and b) can be easily latched with the LH-edge of strobe DSTBn as they will remain valid for

about 0.4µs beyond as a minimum.

Care must be taken however, that signal delay added by external circuitry is lower for the strobe than for the data.

Data inData out

Data in

Data out

STB

DSTBn

+ 0.4 µs

DSTBn

+ t

OUTOFF

DSTBn

INPmin

INPmax

DSTBn

Figure 3 Timing of data transfer at data port D3, …, D0 relative to strobe DSTBn

The following table specifies the timing parameters relating to Figure 3:

Symbol Parameter Min Max Unit Note

tSTB Delay DSTBn HL-edge to Dx output data valid 1.5 µs

tDSTBn DSTBn strobe width 6 6.8 µs 1

tOUTOFF Delay DSTBn LH-edge to Dx output off 0.2 1 µs 2

tINP Input data valid time window 10.5 12.5 µs 3

P1-P3 P4-P6 P7-P9 P10-P12 P13-P13

AS2702-20

Mfr. #:

Buy AS2702-20

Manufacturer:

ams

Description:

Sensor Interface AS-Interface Slave IC

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AS2702-20

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