FM75M8 Datasheet FM75M8, FM75M8X | P7-P9

FM75 Low-Voltage Two-Wire Digital Temperature Sensor with Thermal Alarm

FM75 Rev. 1.0.8 7

Comparator Mode

In comparator mode, each time a temperature-to-digital

(T-to-D) temperature conversion occurs, the new digital

temperature is compared to the value stored in the T

and T

HYST

registers. If a fault tolerance number of con-

secutive temperature measurements are greater than

the value stored in the T

vated. For example, if bits F1 and F0 are equal to “10”

(fault tolerance = 4), four consecutive temperature mea-

surements must exceed T

to activate the OS output.

Once the OS output is active, it remains active until the

first time the measured temperature drops below the

temperature stored in the T

HYST

of the alarm in comparator mode with fault tolerance = 2

is illustrated in Figure 4.

Interrupt Mode

In interrupt mode, the OS output first becomes active

after a fault tolerance number of consecutive tempera-

ture measurements exceed the value stored in the T

it can only be cleared by a user read from any of the

FM75 registers (temperature, configuration, T

, or

HYST

) or by putting the FM75 into shutdown mode (i.e.,

by setting the shutdown bit in the configuration register to

“1”). Once cleared, the OS output can only be activated

the next time by a fault tolerance number of consecutive

temperature measurements lower than the value stored

in T

HYST

. Once it is activated, the OS output can only be

deactivated by a user read or shutdown. In interrupt

mode, the activate/clear cycle for OS has the following

pattern: temperature > T

, clear, temperature < T

HYST

clear, temperature > T

, clear, etc. The operation of the

alarm in interrupt mode with fault tolerance = 2 is illus-

trated in Figure 4.

Figure 4. Thermal Alarm Operation in Comparator and Interrupt Modes

For this example:

Fault Tolerance = 2

Output Polarity = Active Low

Read (or Shutdown)

HYST

Temperature-to-Digital

Conversion

OS (Comparator Mode)

OS (Interrupt Mode)

FM75 Low-Voltage Two-Wire Digital Temperature Sensor with Thermal Alarm

FM75 Rev. 1.0.8 8

Registers

The FM75 contains the following five registers:

■ Command Register

■ Temperature Register

■ Configuration Register

■ Over-Limit-Signal Temperature Register (T

)

■ Hysteresis Temperature Register (T

HYST

)

All of these registers can be accessed by the user via the

digital serial interface at any time (see Serial Interface

Operation for instructions). A detailed description of

these registers and their functions is provided in the fol-

lowing sections. A diagram of the register hierarchy is

shown in Figure 5.

Figure 5. Register Hierarchy

Command Register

The command register is a one-byte (8-bit) write-only

cates which of the other registers (temperature, configu-

ration, T

, or T

HYST

) to read from or write to during an

upcoming operation. The command register “points” to

the selected register, as shown in Figure 11.

The command register is illustrated in Figure 9. The P1

and P0 bits of the command register determine which

Significant Bits (MSBs) of the command register must

always be zero. Writing a one into any of these bits

causes the current operation to be terminated.

The command register retains pointer information

between operations; therefore, this register only needs

to be updated once for consecutive read operations from

the same register. All bits in the command register

default to zero at power-up.

Figure 6. Command Register Format

Table 2. Register Assignments for Command

Bits P1 and P2

Serial Interface

Command Register

1-byte Write Only

Temperature Register

2-byte Read Only

Command Reg. = 00000000

Configuration Register

1-byte Read/Write

Command Reg. = 00000001

HYST

2-byte Read/Write

Command Reg. = 00000010

2-byte Read/Write

Command Reg. = 00000011

Command

(Pointer)

Data

Read/Write

Data

SDA

SCL

Temperature Register 0 0

Configuration Register 0 1

HYST

000

MSB

LSB

FM75 Low-Voltage Two-Wire Digital Temperature Sensor with Thermal Alarm

FM75 Rev. 1.0.8 9

Temperature Register

The temperature register is a two-byte (16-bit) read-only

are stored in the temperature register in two’s comple-

ment format and the contents of this register are updated

at regular intervals, each time the T-to-D conversion is

finished.

The user can read data from the temperature register at

any time. When a T-to-D conversion is completed, the

new data is loaded into a comparator buffer to evaluate

fault conditions and updates the temperature register if a

read cycle is not ongoing. The FM75 is continuously

evaluating fault conditions regardless of read or write

activity on the bus. If a read is ongoing, the previous

temperature is read. The readable temperature is

updated upon the completion of the next T-to-D conver-

sion not masked by a read cycle.

The temperature register is illustrated in Figure 7.

Depending on the resolution of the T-to-D conversion,

the 9, 10, 11, or 12 MSBs of the register contain temper-

ature data. All unused bits following the digital tempera-

ture are zero. The MSB position of the temperature

perature and bit 14 contains the temperature MSB. Bits

in the temperature register default to zero at power-up.

SB = Two’s complement sign bit

TMSB = Temperature MSB

T = Temperature data

9-bit LSB = Temperature LSB for 9-bit conversions

10-bit LSB = Temperature LSB for 10-bit conversions

11-bit LSB = Temperature LSB for 11-bit conversions

12-bit LSB = Temperature LSB for 12-bit conversions

Figure 7. Temperature Register Format

Configuration Register

The configuration register is a one-byte (8-bit) read/write

control the FM75 shutdown mode as well as the follow-

ing thermal alarm features: polarity, operating mode, and

fault tolerance. The configuration register contains two

bits that set the fault tolerance trip point. The fault toler-

ance trip point is the number of consecutive times the

internal circuit reads the temperature and finds the tem-

perature outside the limits programmed. The pro-

grammed limits are defined by the T

upper limit and by the T

HYST

Table 4 shows the relationship between F1 and F0 and

the number of consecutive errors or “trips” needed to

activate the alarm. The configuration register also con-

tains the two bits that set the T-to-D conversion resolu-

tion to 9, 10, 11, or 12 bits. Table 3 shows the

relationship between R1 and T0 and the conversion res-

olution. All bits in the configuration register default to

zero at power-up.

R1 = Resolution bit 1 (see Table 3).

R0 = Resolution bit 0 (see Table 3).

F1 = Fault tolerance bit 1 (see Table 4).

F0 = Fault tolerance bit 0 (see Table 4).

POL = OS output polarity: 0 = active low, 1 = active

high.

CMP/INT = thermostat mode: 0 = comparator mode,

1 = inerrupt mode.

SD = shutdown: 0 = normal operation, 1 = shutdown

mode.

Figure 8. Configuration Register Format

Table 3. Conversion Resolution Settings

Table 4. Fault Tolerance Settings

TMSB

TTT

MSB

13 12 11

10 9

9-bit

LSB

10-bit

LSB

11-bit

LSB

12-bit

LSB

A-to-D

Conversion Resolution R1 R0

9 Bits 0 0

10 Bits 0 1

11 Bits 1 0

12 Bits 1 1

Fault Tolerance R1 R0

100

201

410

611

R0 F1 F0

POL

CMP/

INT

MSB

LSB

543

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P16

FM75M8

Mfr. #:

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Board Mount Temperature Sensors Low Voltage Digital I2C comp Temp Sensor

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