BATTERY PROTECTION IC FOR 1-CELL PACK
S-8261 Series
Rev.5.3_00
Seiko Instruments Inc.
16
(6) Test Condition 6, Test Circuit 3
(Internal Resistance between VM and VDD, Internal Resistance between VM and VSS)
The resistance between VM and VDD (R
VMD
) is the internal resistance between VM and VDD under the set
conditions of V1
= 1.8 V and V2 = 0 V.
The resistance between VM and VSS (R
VMS
) is the internal resistance between VM and VSS under the set
conditions of V1
= 3.5 V and V2 = 1.0 V.
(7) Test Condition 7, Test Circuit 4
(CO Pin Resistance “H”, CO Pin Resistance “L”)
The CO pin resistance “H” (R
COH
) is the resistance the CO pin under the set condition of V1 = 3.5 V, V2 = 0 V and V3
= 3.0 V.
The CO pin resistance “L” (R
COL
) is the resistance the CO pin under the set condition of V1 = 4.5 V, V2 = 0 V and V3
= 0.5 V.
(8) Test Condition 8, Test Circuit 4
(DO Pin Resistance “H”, DO Pin Resistance “L”)
The DO pin resistance “H” (R
DOH
) is the resistance the DO pin under the set condition of V1 = 3.5 V, V2 = 0 V and V4
= 3.0 V.
The DO pin resistance “L” (R
DOL
) is the resistance the DO pin under the set condition of V1 = 1.8 V, V2 = 0 V and V4
= 0.5 V.
(9) Test Condition 9, Test Circuit 5
(Overcharge Detection Delay Time, Overdischarge Detection Delay Time)
The overcharge detection delay time (t
CU
) is the time needed for V
CO
to change from “H” to “L” just after the voltage
V1 momentarily increases (within 10
μs) from the overcharge detection voltage (V
CU
) − 0.2 V to the overcharge
detection voltage (V
CU
) + 0.2 V under the set condition of V2 = 0 V.
The overdischarge detection delay time (t
DL
) is the time needed for V
DO
to change from “H” to “L” just after the
voltage V1 momentarily decreases (within 10
μs) from the overdischarge detection voltage (V
DL
) +0.2 V to the
overdischarge detection voltage (V
DL
) − 0.2 V under the set condition of V2 = 0 V.
(10) Test Condition 10, Test Circuit 5
(Overcurrent 1 Detection Delay Time, Overcurrent 2 Detection Delay Time, Load Short-circuiting Detection
Delay Time, Abnormal Charge Current Detection Delay Time)
The overcurrent 1 detection delay time (t
IOV1
) is the time needed for V
DO
to go “L” after the voltage V2 momentarily
increases (within 10
μs) from 0 V to 0.35 V under the set condition of V1 = 3.5 V and V2=0 V.
The overcurrent 2 detection delay time (t
IOV2
) is the time needed for V
DO
to go “L” after the voltage V2 momentarily
increases (within 10
μs) from 0 V to 0.7 V under the set condition of V1 = 3.5 V and V2 = 0 V.
The load short-circuiting detection delay time (t
SHORT
) is the time needed for V
DO
to go “L” after the voltage V2
momentarily increases (within 10
μs) from 0 V to 1.6 V under the set condition of V1 = 3.5 V and V2 = 0 V.
The abnormal charge current detection delay time is the time needed for V
CO
to go from “H” to “L” after the voltage
V2 momentarily decreases (within 10
μs) from 0 V to −1.1 V under the set condition of V1 = 3.5 V and V2 = 0 V. The
abnormal charge current detection delay time has the same value as the overcharge detection delay time.
(11) Test Condition 11, Test Circuit 2 (0 V battery charge function)
(0 V Battery Charge Starting Charger Voltage)
The 0 V battery charge starting charger voltage (V
0CHA
) is defined as the voltage between VDD and VM at which V
CO
goes “H” (V
VM
+ 0.1 V or higher) when the voltage V2 is gradually decreased from the starting condition of V1 = V2 =
0 V.
(12) Test Condition 12, Test Circuit 2 (0 V battery charge inhibition function)
(0 V Battery Charge Inhibition Battery Voltage)
The 0 V battery charge inhibition battery voltage (V
0INH
) is defined as the voltage between VDD and VSS at which
V
CO
goes “H” (V
VM
+ 0.1 V or higher) when the voltage V1 is gradually increased from the starting condition of V1 = 0
V and V2
= −4 V.
