MAX7042ATJ+T Datasheet MAX7042ATJ+, MAX7042ATJ+T | P10-P12

MAX7042

308MHz/315MHz/418MHz/433.92MHz

Low-Power, FSK Superheterodyne Receiver

10 ______________________________________________________________________________________

Detailed Description

The MAX7042 CMOS superheterodyne receiver and a

few external components provide a complete FSK

receive chain from the antenna to the digital output

data. FSK uses the difference in frequency of the carri-

er to represent a logic 0 and logic 1. Depending on sig-

nal power and component selection, data rates as high

as 66kbps NRZ can be achieved.

Frequency Selection

The MAX7042 can be tuned to one of four frequencies

using the 2 frequency-select bits FSEL1 and FSEL2:

308, 315, 418, and 433.92MHz, as shown in Table 1.

The LO frequencies are 32 times the crystal reference

frequencies of 9.29063, 9.50939, 12.72813, and

13.22563MHz. The selected crystal frequency is used

to calibrate the FSK detector PLL so that it operates at

the middle of the 10.7MHz IF.

Low-Noise Amplifier (LNA)

The LNA is a cascode amplifier with off-chip inductive

degeneration. The gain and the noise figure are depen-

dent on both the antenna matching network at the LNA

input and the LC tank network between the LNA output

and the mixer input.

The MAX7042 allows for user programmability of the

LNA bias current. Input LNASEL programs 1x to 2x

bias currents in increments of 0.6mA from 0.6mA to

1.2mA. Setting LNASEL to logic-low programs the LNA

to consume 1x bias current and setting LNASEL to

logic-high programs the LNA to consume 2x bias cur-

rent. Larger bias currents yield better sensitivity and

gain at the expense of current drain.

The off-chip inductive degeneration is achieved by

connecting an inductor from LNASRC to AGND. This

inductor sets the real part of the input impedance at

LNAIN, allowing for a more flexible match to a low-input

impedance such as printed circuit board (PCB) trace

antenna. A nominal value of this inductor for a 50Ω input

impedance is 3.9nH at 315MHz and 0nH (short) at

433.92MHz, but is affected by the PCB trace. See the

Typical Operating Characteristics

for the relationship

between the inductance and input impedance.

The LC tank filter connected to LNAOUT consists of L2

and C9 (see the

Typical Application Circuit

). Select L2

and C9 to resonate at the desired RF input frequency.

The resonant frequency is given by:

where L

TOTAL

= L2 + L

PARASITICS

and C

TOTAL

= C9 +

PARASITICS

and C

PARASITICS

include inductance and

capacitance of the PCB traces, package pins, mixer

input impedance, LNA output impedance, etc. These

parasitics at high frequencies cannot be ignored, and

can have a dramatic effect on the tank filter center fre-

quency. Lab experimentation is required to optimize the

center frequency of the tank. The parasitic capacitance

is generally 5pF to 7pF.

There are two ways to verify experimentally that the res-

onant frequency of the tank is centered at the desired

RF frequency:

1) Drive the crystal oscillator externally and sweep both

the RF frequency and the LO frequency (FXTAL x

32) to keep the IF at 10.7MHz while monitoring the

RSSI voltage (pin 4). There is a peak in the RSSI

voltage at resonance. The external source must be

AC-coupled into XTAL1 and the XTAL2 pin must

have an AC bypass to ground. The recommended

drive power is -10dBm.

2) Use a network analyzer to measure the resonance.

The port 1 power from the network analyzer is input

to the receiver, and this power must be -30dBm or

less. A coaxial stub with the center conductor

exposed (commonly called an RF “sniffer” is used to

monitor the tank power and serves as the port 2

input to the network analyzer. The sniffer should be

placed in close proximity to, but not actually touch-

ing, the tank inductor.

LxC

TOTAL TOTAL

2π

Table 1. Frequency Selection Table

FSEL2 FSEL1

FREQUENCY

(MHz)

0 0 308

0 1 315

1 0 418

1 1 433.92

MAX7042

308MHz/315MHz/418MHz/433.92MHz

Low-Power, FSK Superheterodyne Receiver

______________________________________________________________________________________ 11

Mixer

A unique feature of the MAX7042 is the integrated image

rejection of the mixer. This device is designed to elimi-

nate the need for a costly front-end SAW filter in many

applications. The advantages of not using a SAW filter

are increased sensitivity, simplified antenna matching,

less board space, and lower cost.

The mixer cell is a pair of double-balanced mixers that

perform an IQ downconversion of the RF input to the

10.7MHz intermediate frequency (IF) with low-side

injection (i.e., f

= f

- f

). The image-rejection circuit

then combines these signals to achieve a typical image

rejection of approximately 45dB. Low-side injection is

required as high-side injection is not possible due to

the on-chip image rejection. The IF output is driven by

a source follower, biased to create a driving imped-

ance of 330Ω to interface with an off-chip 330Ω ceram-

ic IF filter. Note that MIXIN+ and MIXIN- are functionally

identical.

Phase-Locked Loop (PLL)

The PLL block contains a phase detector, charge

pump/integrated loop filter, voltage-controlled oscillator

(VCO), asynchronous 32x frequency divider, and crys-

tal oscillator. This PLL does not require any external

components. The relationship between the RF, IF, and

crystal reference frequencies is given by:

For additional information on proper crystal selection,

see the

Crystal Oscillator

and

Frequency Tolerance

sections.

Intermediate Frequency (IF)

The IF section presents a differential 330Ω load to pro-

vide matching for the off-chip ceramic filter. The inter-

nal six AC-coupled limiting amplifiers produce an

overall gain of approximately 65dB. The limiting ampli-

fiers have a bandpass-filter-type response centered

near the 10.7MHz IF frequency with a 3dB bandwidth

of approximately 10MHz. The limiter output is fed into a

PLL to demodulate the IF, producing a baseband volt-

age with a demodulation slope of 2.1mV/kHz. The RSSI

circuit produces a DC output proportional to the log of

the IF signal level with a slope of approximately

16mV/dB.

FSK Demodulator

The FSK demodulator uses an integrated 10.7MHz PLL

that tracks the input RF modulation and determines the

difference between frequencies as logic ones and

zeros. The PLL is illustrated in Figure 1. The input to the

PLL comes from the output of the IF limiting amplifiers.

The PLL control voltage responds to changes in the fre-

quency of the input signal with a nominal gain of

2.1mV/kHz. For example, an FSK peak-to-peak devia-

tion of 50kHz generates a 105mV

P-P

signal on the con-

trol line. This control line is then filtered and sliced by

the FSK baseband circuitry.

The FSK demodulator PLL requires calibration to over-

come variations in process, voltage, and temperature.

The maximum calibration time is 120µs, which is includ-

ed in the startup time. Recalibration is necessary after a

significant change in temperature or supply voltage.

Calibration occurs automatically each time the

MAX7042 is powered up. Drive EN low and then high to

force a recalibration. EN must be driven from low to

high after the MAX7042 supply voltage is stable for

proper initial FSK calibration.

XTAL

RF IF

()

−

LOOP

FILTER

PHASE

DETECTOR

LIMITING

AMPS

TO FSK

BASEBAND FILTER

AND DATA SLICER

10.7MHz VCO

2.1mV/kHz

CHARGE

PUMP

Figure 1. FSK Demodulator PLL Block Diagram

MAX7042

308MHz/315MHz/418MHz/433.92MHz

Low-Power, FSK Superheterodyne Receiver

12 ______________________________________________________________________________________

Crystal Oscillator

The XTAL oscillator in the MAX7042 is used to generate

the LO for mixing with the received signal. The XTAL oscil-

lator frequency sets the received signal frequency as:

RECEIVE

= (f

XTAL

x 32) + 10.7MHz

The received image frequency at:

IMAGE

= (f

XTAL

x 32) - 10.7MHz

is suppressed by the integrated quadrature image-

rejection circuitry.

The XTAL oscillator in the MAX7042 is designed to pre-

sent a capacitance of approximately 3pF between

XTAL1 and XTAL2. In most cases, this corresponds to a

4.5pF load capacitance applied to the external crystal

when typical PCB parasitics are added. It is very impor-

tant to use a crystal with a load capacitance that is equal

to the capacitance of the MAX7042 crystal oscillator plus

PCB parasitics. If a crystal designed to oscillate with a

different load capacitance is used, the crystal is pulled

away from its intended operating frequency, introducing

an error in the reference frequency. Crystals designed to

operate with higher differential load capacitance always

pull the reference frequency higher.

In reality, the oscillator pulls every crystal. A crystal’s nat-

ural frequency is really below its specified frequency, but

when loaded with the specified load capacitance, the

crystal is pulled and oscillates at its specified frequency.

This pulling is accounted for in the specification of the

load capacitance.

Additional pulling can be calculated if the electrical

parameters of the crystal are known. The frequency

pulling is given by:

where:

is the amount the crystal frequency is pulled in ppm.

is the motional capacitance of the crystal.

case

is the case capacitance.

spec

is the specified load capacitance.

load

is the actual load capacitance.

When the crystal is loaded as specified, i.e., C

load

spec

, the frequency pulling equals zero.

Frequency Tolerance

The frequency tolerance of the crystal, the frequency

and bandwidth tolerance of the IF filter, and the desired

modulation bandwidth of the signal are all interrelated.

The combination of these characteristics should be such

to ensure that the modulated signal bandwidth stays

within the passband of the IF filter after downconversion.

As is shown below, a 50ppm tolerance crystal in combi-

nation with a 280kHz bandwidth IF filter is sufficient for

most FSK-modulated signals.

Smaller IF filter bandwidths can be used if high-tolerance

crystals are used for generating both transmitter and

MAX7042 receiver PLL references. The modulated spec-

trum of the transmitted signal must be downconverted by

the MAX7042 to fall within the passband of the IF filter.

The crystal tolerances must take into account the initial

+25°C tolerance, aging, load capacitance tolerances,

and temperature drift for both the transmitter and

MAX7042 receiver. To achieve acceptable signal recep-

tion, the following equation must hold:

2 x (∆F

+ ∆F

+ F

DEV

+ 5 x F

MOD

) < IFBW

min

where:

∆F

= (transmitter crystal tolerance in ppm) x (carrier

frequency in MHz). This includes aging, load capaci-

tance, and temperature effects for the crystal tolerance.

∆F

= (MAX7042 crystal tolerance in ppm) x (carrier

frequency in MHz). This includes aging, load capaci-

tance, and temperature effects for the crystal tolerance.

∆F

= The center frequency tolerance of the selected

IF filter. This includes temperature drift of the IF filter

center frequency.

DEV

= ±FSK frequency deviation from carrier frequency.

MOD

= One half of NRZ data rate, or the data rate if

Manchester coding is used.

IFBW

min

= The minimum bandwidth of the selected IF

filter.

As an example, assume 315MHz carrier frequency,

±50ppm crystal tolerances for both transmitter and

MAX7042, ±30kHz IF filter center frequency tolerance,

±50kHz frequency deviation, and 4.8kHz Manchester

data rate:

2 x [(315 x 50) + (315 x 50) + 30000 +50000 + 5 x

4800] = 271kHz < IFBW

min

This operating condition necessitates a 280kHz IF filter.

CC CC

case load case spec

−

⎛

⎝

⎜

⎞

⎠

⎟

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P17

MAX7042ATJ+T

Mfr. #:

Buy MAX7042ATJ+T

Manufacturer:

Maxim Integrated

Description:

RF Receiver 308/315/418/433.9MHz FSK Superhtrdyne Rec

Lifecycle:

New from this manufacturer.

Delivery:

DHL FedEx Ups TNT EMS

Payment:

T/T Paypal Visa MoneyGram Western Union

MAX7042ATJ+T

MAX7042ATJ+T

Products related to this Datasheet