NXP Semiconductors
PSMN1R0-30YLD
N-channel 30 V, 1.0 mΩ, 300 A logic level MOSFET in LFPAK56 using
NextPowerS3 Technology
PSMN1R0-30YLD All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved
Product data sheet 14 December 2015 6 / 13
Symbol Parameter Conditions Min Typ Max Unit
ΔV
GS(th)
/ΔT gate-source threshold
voltage variation with
temperature
25 °C ≤ T
j
≤ 150 °C - -4.9 - mV/K
V
DS
= 24 V; V
GS
= 0 V; T
j
= 25 °C - - 1 µAI
DSS
drain leakage current
V
DS
= 24 V; V
GS
= 0 V; T
j
= 125 °C - 2.8 - µA
V
GS
= 16 V; V
DS
= 0 V; T
j
= 25 °C - - 100 nAI
GSS
gate leakage current
V
GS
= -16 V; V
DS
= 0 V; T
j
= 25 °C - - 100 nA
V
GS
= 4.5 V; I
D
= 25 A; T
j
= 25 °C;
Fig. 10
- 1 1.3
V
GS
= 4.5 V; I
D
= 25 A; T
j
= 150 °C;
Fig. 11; Fig. 10
- - 2.15
V
GS
= 10 V; I
D
= 25 A; T
j
= 25 °C;
Fig. 10
- 0.79 1.02
R
DSon
drain-source on-state
resistance
V
GS
= 10 V; I
D
= 25 A; T
j
= 150 °C;
Fig. 11; Fig. 10
- - 1.7
R
G
gate resistance f = 1 MHz - 1.22 2.44 Ω
Dynamic characteristics
I
D
= 25 A; V
DS
= 15 V; V
GS
= 10 V;
Fig. 12; Fig. 13
- 80.9 121.35 nC
I
D
= 25 A; V
DS
= 15 V; V
GS
= 4.5 V;
Fig. 12; Fig. 13
- 38.2 57.3 nC
Q
G(tot)
total gate charge
I
D
= 0 A; V
DS
= 0 V; V
GS
= 10 V - 72 - nC
Q
GS
gate-source charge - 12.5 - nC
Q
GS(th)
pre-threshold gate-
source charge
- 7.8 - nC
Q
GS(th-pl)
post-threshold gate-
source charge
- 4.7 - nC
Q
GD
gate-drain charge
I
D
= 25 A; V
DS
= 15 V; V
GS
= 4.5 V;
Fig. 12; Fig. 13
- 10.9 16.35 nC
V
GS(pl)
gate-source plateau
voltage
I
D
= 25 A; V
DS
= 15 V; Fig. 12; Fig. 13 - 2.6 - V
C
iss
input capacitance - 5732 8598 pF
C
oss
output capacitance - 2424 3636 pF
C
rss
reverse transfer
capacitance
V
DS
= 15 V; V
GS
= 0 V; f = 1 MHz;
T
j
= 25 °C; Fig. 14
- 340 510 pF
t
d(on)
turn-on delay time - 32.4 - ns
t
r
rise time - 44.4 - ns
t
d(off)
turn-off delay time - 43 - ns
t
f
fall time
V
DS
= 15 V; R
L
= 1 Ω; V
GS
= 4.5 V;
R
G(ext)
= 5 Ω
- 31.7 - ns
NXP Semiconductors
PSMN1R0-30YLD
N-channel 30 V, 1.0 mΩ, 300 A logic level MOSFET in LFPAK56 using
NextPowerS3 Technology
PSMN1R0-30YLD All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved
Product data sheet 14 December 2015 7 / 13
Symbol Parameter Conditions Min Typ Max Unit
Q
oss
output charge V
GS
= 0 V; V
DS
= 15 V; f = 1 MHz;
T
j
= 25 °C
- 55.9 - nC
Source-drain diode
V
SD
source-drain voltage I
S
= 25 A; V
GS
= 0 V; T
j
= 25 °C; Fig. 15 - 0.77 1.2 V
t
rr
reverse recovery time - 51.8 103.6 ns
Q
r
recovered charge [1] - 67.1 134.2 nC
t
a
reverse recovery rise
time
- 26.5 - ns
t
b
reverse recovery fall
time
- 25.3 - ns
S softness factor
I
S
= 25 A; dI
S
/dt = -100 A/µs; V
GS
= 0 V;
V
DS
= 15 V; Fig. 16
- 0.95 -
[1] includes capacitive recovery
aaa-011665
0 0.5 1 1.5 2 2.5
0
40
80
120
160
V
DS
(V)
I
D
I
D
(A)(A)
2.4 V2.4 V
2.6 V2.6 V
2.8 V2.8 V
V
GS
= 3 VV
GS
= 3 V
3.5 V3.5 V10 V10 V
Fig. 7. Output characteristics; drain current as a
function of drain-source voltage; typical values
aaa-011666
0 2 4 6 8 10 12 14 16
0
1
2
3
4
5
6
V
GS
(V)
R
DSon
R
DSon
(mΩ)(mΩ)
Fig. 8. Drain-source on-state resistance as a function
of gate-source voltage; typical values
NXP Semiconductors
PSMN1R0-30YLD
N-channel 30 V, 1.0 mΩ, 300 A logic level MOSFET in LFPAK56 using
NextPowerS3 Technology
PSMN1R0-30YLD All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved
Product data sheet 14 December 2015 8 / 13
aaa-011667
0 0.8 1.6 2.4 3.2 4
0
40
80
120
160
200
V
GS
(V)
I
D
I
D
(A)(A)
T
j
= 25°CT
j
= 25°C150°C150°C
Fig. 9. Transfer characteristics; drain current as a
function of gate-source voltage; typical values
aaa-011668
0 25 50 75 100 125 150 175 200
0
3
6
9
12
I
D
(A)
R
DSon
R
DSon
(mΩ)(mΩ)
2.8 V2.8 V 3 V3 V
3.5 V3.5 V
4.5 V4.5 V
V
GS
= 10 VV
GS
= 10 V
Fig. 10. Drain-source on-state resistance as a function
of drain current; typical values
003aal037
-60 -30 0 30 60 90 120 150 180
0
0.4
0.8
1.2
1.6
2
T
j
(°C)
aa
10 V10 V
V
GS
= 4.5 VV
GS
= 4.5 V
Fig. 11. Normalized drain-source on-state resistance
factor as a function of junction temperature
003aaa508
V
GS
V
GS(th)
Q
GS1
Q
GS2
Q
GD
V
DS
Q
G(tot)
I
D
Q
GS
V
GS(pl)
Fig. 12. Gate charge waveform definitions

PSMN1R0-30YLDX

Mfr. #:
Manufacturer:
Nexperia
Description:
MOSFET N-CH 30V 1.0 mOhm logic level MOSFET
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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