LTC3812-5
27
38125fc
EFFICIENCY CONSIDERATIONS
The percent effi ciency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the effi ciency and which change would
produce the most improvement. Although all dissipative
elements in the circuit produce losses, four main sources
account for most of the losses in LTC3812-5 circuits:
1. DC I
2
R losses. These arise from the resistances of the
MOSFETs, inductor and PC board traces and cause the
effi ciency to drop at high output currents. In continuous
mode the average output current fl ows through L, but is
chopped between the top and bottom MOSFETs. If the two
MOSFETs have approximately the same R
DS(ON)
, then
the resistance of one MOSFET can simply be summed
with the resistances of L and the board traces to obtain
the DC I
2
R loss. For example, if R
DS(ON)
= 0.01Ω and
R
L
= 0.005Ω, the loss will range from 15mW to 1.5W
as the output current varies from 1A to 10A.
2. Transition loss. This loss arises from the brief amount
of time the top MOSFET spends in the saturated region
during switch node transitions. It depends upon the
input voltage, load current, driver strength and MOSFET
capacitance, among other factors. The loss is signifi cant
at input voltages above 20V and can be estimated from
the second term of the P
MAIN
equation found in the Power
MOSFET Selection section. When transition losses are
signifi cant, effi ciency can be improved by lowering the
frequency and/or using a top MOSFET(s) with lower
C
RSS
at the expense of higher R
DS(ON)
.
3. INTV
CC
current. This is the sum of the MOSFET
driver and control currents. Control current is typically
about 3mA and driver current can be calculated by:
I
GATE
= f(Q
G(TOP)
+ Q
G(BOT)
), where Q
G(TOP)
and Q
G(BOT)
are the gate charges of the top and bottom MOSFETs.
This loss is proportional to the supply voltage that
INTV
CC
is derived from, i.e., V
IN
for the external NMOS
linear regulator, V
OUT
for the internal EXTV
CC
regula-
tor, or V
EXT
when an external supply is connected to
INTV
CC
.
4. C
IN
loss. The input capacitor has the diffi cult job of fi l-
tering the large RMS input current to the regulator. It
must
have a very low ESR to minimize the AC I
2
R loss
and suffi cient capacitance to prevent the RMS current
from
causing additional upstream losses in fuses or
batteries.
Other losses, including C
OUT
ESR loss, Schottky diode D1
conduction loss during dead time and inductor core loss
generally account for less than 2% additional loss. When
making adjustments to improve effi ciency, the input cur-
rent is the best indicator of changes in effi ciency. If you
make a change and the input current decreases, then the
effi ciency has increased. If there is no change in input
current, then there is no change in effi ciency.
CHECKING TRANSIENT RESPONSE
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
load step occurs, V
OUT
immediately shifts by an amount
equal to ∆I
LOAD
(ESR), where ESR is the effective series
resistance of C
OUT
. ∆I
LOAD
also begins to charge or dis-
charge C
OUT
generating a feedback error signal used by the
regulator to return V
OUT
to its steady-state value. During
this recovery time, V
OUT
can be monitored for overshoot
or ringing that would indicate a stability problem.
DESIGN EXAMPLE
As a design example, take a supply with the following
specifi cations: V
IN
= 12V to 60V, V
OUT
= 5V ±5%, I
OUT(MAX)
= 6A, f = 250kHz. First, calculate the timing resistor:
R
ON
=
5V
2.4V • 250kHz • 76pF
= 110k
and choose the inductor for about 40% ripple current at
the maximum V
IN
:
L =
5V
250kHz • 0.4 • 6A
1
5V
60V
= 7.6μH
With a 7.7μH inductor, ripple current will vary from 1.5A
to 2.4A (25% to 40%) over the input supply range.
Next, choose the bottom MOSFET switch. Since the
drain of the MOSFET will see the full supply voltage 60V
APPLICATIONS INFORMATION
