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PCA9633DP1,118

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P43
PCA9633_5 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 05 — 25 July 2008 22 of 43
NXP Semiconductors
PCA9633
4-bit Fm+ I
2
C-bus LED driver
8.3 Acknowledge
The number of data bytes transferred between the START and the STOP conditions from
transmitter to receiver is not limited. Each byte of eight bits is followed by one
acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter,
whereas the master generates an extra acknowledge related clock pulse.
A slave receiver which is addressed must generate an acknowledge after the reception of
each byte. Also a master must generate an acknowledge after the reception of each byte
that has been clocked out of the slave transmitter. The device that acknowledges has to
pull down the SDA line during the acknowledge clock pulse, so that the SDA line is stable
LOW during the HIGH period of the acknowledge related clock pulse; set-up time and hold
time must be taken into account.
A master receiver must signal an end of data to the transmitter by not generating an
acknowledge on the last byte that has been clocked out of the slave. In this event, the
transmitter must leave the data line HIGH to enable the master to generate a STOP
condition.
Fig 14. System configuration
002aaa966
MASTER
TRANSMITTER/
RECEIVER
SLAVE
RECEIVER
SLAVE
TRANSMITTER/
RECEIVER
MASTER
TRANSMITTER
MASTER
TRANSMITTER/
RECEIVER
SDA
SCL
I
2
C-BUS
MULTIPLEXER
SLAVE
Fig 15. Acknowledgement on the I
2
C-bus
002aaa987
S
START
condition
9821
clock pulse for
acknowledgement
not acknowledge
acknowledge
data output
by transmitter
data output
by receiver
SCL from master
PCA9633_5 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 05 — 25 July 2008 23 of 43
NXP Semiconductors
PCA9633
4-bit Fm+ I
2
C-bus LED driver
9. Bus transactions
(1) 16-pin version only.
(2) See Table 7 for register definition.
Fig 16. Write to a specific register
A5 A4 A3 A2 A1 A0 0 AS A6
slave address
(1)
START condition R/W
acknowledge
from slave
002aab418
data for register D3, D2, D1, D0
(2)
X X 0 D3 D2 D1 D0X
control register
Auto-Increment flag
Auto-Increment options
A
acknowledge
from slave
A
acknowledge
from slave
P
STOP
condition
(1) 16-pin version only.
Fig 17. Write to all registers using the Auto-Increment feature
A5 A4 A3 A2 A1 A0 0 AS A6
slave address
(1)
START condition R/W
acknowledge
from slave
002aab419
MODE1 register
0 0 0 0 0 0 01
control register
Auto-Increment on
Auto-Increment
on all registers
A
acknowledge
from slave
A
acknowledge
from slave
P
STOP
condition
(cont.)
(cont.)
MODE1
register
selection
MODE2 register
A
acknowledge
from slave
SUBADR3 register
A
acknowledge
from slave
ALLCALLADR register
A
acknowledge
from slave
PCA9633_5 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 05 — 25 July 2008 24 of 43
NXP Semiconductors
PCA9633
4-bit Fm+ I
2
C-bus LED driver
(1) 16-pin version only.
Fig 18. Multiple writes to Individual Brightness registers only using the Auto-Increment feature
A5 A4 A3 A2 A1 A0 0 AS A6
slave address
(1)
START condition R/W
acknowledge
from slave
002aab420
PWM0 register
0 1 0 0 0 1 01
control register
Auto-Increment on
increment
on Individual
brightness
registers only
A
acknowledge
from slave
A
acknowledge
from slave
P
STOP
condition
(cont.)
(cont.)
PWM0
register
selection
PWM1 register
A
acknowledge
from slave
PWM2 register
A
acknowledge
from slave
PWM3 register
A
acknowledge
from slave
PWM0 register
A
acknowledge
from slave
PWMx register
A
acknowledge
from slave
(1) 16-pin version only.
Fig 19. Read all registers using the Auto-Increment feature
A5 A4 A3 A2 A1 A0 0 AS A6
slave address
(1)
START condition R/W
acknowledge
from slave
002aab423
0 0 0 0 0 0 01
control register
Auto-Increment on
Auto-Increment
on all registers
A
acknowledge
from slave
(cont.)
(cont.)
MODE1
register
selection
data from MODE1 register
A
acknowledge
from master
Sr
ReSTART
condition
A5 A4 A3 A2 A1 A0 1 AA6
slave address
(1)
R/W
acknowledge
from slave
data from MODE2 register
A
acknowledge
from master
data from PWM0
A
acknowledge
from master
data from
ALLCALLADR register
A
acknowledge
from master
data from
MODE1 register
A
acknowledge
from master
(cont.)
(cont.)
data from last read byte
A
not acknowledge
from master
P
STOP
condition
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P43

PCA9633DP1,118

Mfr. #:
Buy PCA9633DP1,118
Manufacturer:
NXP Semiconductors
Description:
LED Lighting Drivers LED DRVR 4BIT I2C
Lifecycle:
New from this manufacturer.
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