Technical Note
15/16
BD9862MUV
www.rohm.com
2010.03 - Rev.A
© 2010 ROHM Co., Ltd. All rights reserved.
●Notes for Use
1.) Absolute maximum ratings
This is a high quality product, but if absolute maximum rating such as applied voltage and operating temperature range is
exceeded, then deterioration or breakdown may result. Moreover, such destructive conditions as short mode or open
mode can not be assumed. If a particular mode such as exceeding the absolute maximum rating is assumed,
consideration should be given to using physical safety measures such as a fuse.
2.) CND Potential
The electric potential of the GND pin should be the lowest electric potential under any operating state.
In addition, (including transient phenomenon), do not make the electrical potential of any pin lower than the GND’s.
3.) Thermal design
Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions.
4.) Inter-pin shorts and mounting errors
Use caution when orienting and positioning the IC for mounting on printed circuit boards. Improper mounting may result in
damage to the IC.
In addition, shorts between output pins or between output pins and the power supply GND pin caused by the presence of a
foreign object may result in damage to the IC.
5.) Operation in a strong electromagnetic field
Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to
malfunction.
6.) Common impedance
Power supply and GND wiring should reflect consideration of the need to minimize ripples as much as possible., (which
lower common impedance), by making wiring as short and thick as possible or incorporating inductance and capacitance.
7.) Thermal shutdown circuit (TSD circuit)
This IC incorporates a built-in thermal shutdown circuit (TSD circuit). The TSD circuit is designed not for the purpose of
protection & guarantee of the IC, but only to shut the IC off to prevent thermal overload. Therefore, do not use the IC on
the premise that this TSD circuit will be operated to shut the IC off (or the IC will be continued to be used after this TSD
circuit is operated to shut the IC off).
8.) IC pin input
This monolithic IC contains the P+ isolation between adjacent elements in order to keep them isolated from the P
substrate. Due to this P layer and the N layer of each element, the P/N junctions are formed and various kinds of elements
are created.
For example, if a resistor and a transistor are connected with pins as shown in the Fig., then:
○the P/N junction functions as a parasitic diode when
GND > (Pin A) for the resistor or GND > (Pin B) for the transistor (NPN).
○Moreover, when GND > (Pin B) for the transistor (NPN),
the parasitic NPN transistor is operated by N layer of other elements adjacent to the above-mentioned parasitic diode.
The formation of parasitic elements as a result of the relationships of electric potentials is an inevitable result of the IC's
architecture. The operation of parasitic elements can cause interference with the circuit operation as well as IC
malfunction and damage. For these reasons, it is necessary to use caution so that the IC is not used in a way that will
trigger the operation of parasitic elements, such as by the application of voltages lower than the GND (P substrate) voltage
to input pins.
Fig.26 Simple Structure of monolithic IC (Sample)
～
～
(Terminal A)
GND
Parasitic Element
Parasitic Element
Transistor (NPN)
～
～
GND
P Substrate
N
P
N
N
P
+
P
+
(Terminal B)
B
N
E
C
GND
P Substrate
N
P
N
N
P
+
P
+
(Terminal A)
Parasitic Element
Resistance
