XC2C32A CoolRunner-II CPLD
DS310 (v2.1) November 6, 2008 www.xilinx.com 13
Product Specification
Additional Information
Additional information is available for the following CoolRunner-II topics:
• XAPP784: Bulletproof CPLD Design Practices
• XAPP375: Timing Model
• XAPP376: Logic Engine
• XAPP378: Advanced Features
• XAPP382: I/O Characteristics
• XAPP389: Powering CoolRunner-II
• XAPP399: Assigning VREF Pins
To access these and all application notes with their associ-
ated reference designs, click the following links and scroll
down the page until you find the document you want:
CoolRunner-II
CPLD Data Sheets and Application Notes
Device Packages
Revision History
The following table shows the revision history for this document.
Date Version Revision
6/15/04 1.0 Initial Xilinx release.
8/30/04 1.1 Pb-free documentation
10/01/04 1.2 Add Asynchronous Preset/Reset Pulse Width specification to AC Electrical Characteristics.
11/08/04 1.3 Product Release. No changes to documentation.
11/22/04 1.4 Changes to output enable/disable specifications; changes to I
CCSB
.
02/17/05 1.5 Changes to f
TOGGLE
, t
SLEW25
, and t
SLEW33
03/07/05 1.6 Improvement of pin-to-pin logic delay, page 1. Modifications to Table 1, IOSTANDARDs.
06/28/05 1.7 Move to Product Specification. Change to T
IN25
, T
OUT25
, T
IN33
, and T
OUT33
.
03/20/06 1.8 Add Warranty Disclaimer. Add note to Pin Descriptions that
GCK, GSR, and GTS pins can also
be used for general purpose I/O.
02/15/07 1.9 Change to V
IH
specification for 2.5V and 1.8V LVCMOS. Change to T
OEM
for -4 speed
grade.
03/08/07 2.0 Fixed typo in note for V
IL
for LVCMOS18; removed note for V
IL
for LVCMOS33.
11/06/08 2.1 Added note to Pin Description tables to indicate the PC44 packages are obsolete. Removed
part numbers for devices in PC44 packages from ordering information. See Product
Discontinuation Notice
xcn07022.pdf.
